MSPI Driver APIs. More...

Modules
	MSPI Configure API
	MSPI Configure API.

	MSPI Transfer API
	MSPI Transfer API.

	MSPI callback API
	MSPI callback API.

Data Structures
struct	mspi_driver_api

Typedefs
typedef int(*	mspi_api_config) (const struct mspi_dt_spec *spec)
	MSPI driver API definition and system call entry points.

typedef int(*	mspi_api_dev_config) (const struct device controller, const struct mspi_dev_id dev_id, const enum mspi_dev_cfg_mask param_mask, const struct mspi_dev_cfg *cfg)

typedef int(*	mspi_api_get_channel_status) (const struct device *controller, uint8_t ch)

typedef int(*	mspi_api_transceive) (const struct device controller, const struct mspi_dev_id dev_id, const struct mspi_xfer *req)

typedef int(*	mspi_api_register_callback) (const struct device controller, const struct mspi_dev_id dev_id, const enum mspi_bus_event evt_type, mspi_callback_handler_t cb, struct mspi_callback_context *ctx)

typedef int(*	mspi_api_xip_config) (const struct device controller, const struct mspi_dev_id dev_id, const struct mspi_xip_cfg *xip_cfg)

typedef int(*	mspi_api_scramble_config) (const struct device controller, const struct mspi_dev_id dev_id, const struct mspi_scramble_cfg *scramble_cfg)

typedef int(*	mspi_api_timing_config) (const struct device controller, const struct mspi_dev_id dev_id, const uint32_t param_mask, void *timing_cfg)

Enumerations
enum	mspi_op_mode { MSPI_OP_MODE_CONTROLLER = 0 , MSPI_OP_MODE_PERIPHERAL = 1 }
	MSPI operational mode. More...

enum	mspi_duplex { MSPI_HALF_DUPLEX = 0 , MSPI_FULL_DUPLEX = 1 }
	MSPI duplex mode. More...

enum	mspi_io_mode { MSPI_IO_MODE_SINGLE = 0 , MSPI_IO_MODE_DUAL = 1 , MSPI_IO_MODE_DUAL_1_1_2 = 2 , MSPI_IO_MODE_DUAL_1_2_2 = 3 , MSPI_IO_MODE_QUAD = 4 , MSPI_IO_MODE_QUAD_1_1_4 = 5 , MSPI_IO_MODE_QUAD_1_4_4 = 6 , MSPI_IO_MODE_OCTAL = 7 , MSPI_IO_MODE_OCTAL_1_1_8 = 8 , MSPI_IO_MODE_OCTAL_1_8_8 = 9 , MSPI_IO_MODE_HEX = 10 , MSPI_IO_MODE_HEX_8_8_16 = 11 , MSPI_IO_MODE_HEX_8_16_16 = 12 , MSPI_IO_MODE_MAX }
	MSPI I/O mode capabilities Postfix like 1_4_4 stands for the number of lines used for command, address and data phases. More...

enum	mspi_data_rate { MSPI_DATA_RATE_SINGLE = 0 , MSPI_DATA_RATE_S_S_D = 1 , MSPI_DATA_RATE_S_D_D = 2 , MSPI_DATA_RATE_DUAL = 3 , MSPI_DATA_RATE_MAX }
	MSPI data rate capabilities SINGLE stands for single data rate for all phases. More...

enum	mspi_cpp_mode { MSPI_CPP_MODE_0 = 0 , MSPI_CPP_MODE_1 = 1 , MSPI_CPP_MODE_2 = 2 , MSPI_CPP_MODE_3 = 3 }
	MSPI Polarity & Phase Modes. More...

enum	mspi_endian { MSPI_XFER_LITTLE_ENDIAN = 0 , MSPI_XFER_BIG_ENDIAN = 1 }
	MSPI Endian. More...

enum	mspi_ce_polarity { MSPI_CE_ACTIVE_LOW = 0 , MSPI_CE_ACTIVE_HIGH = 1 }
	MSPI chip enable polarity. More...

enum	mspi_bus_event { MSPI_BUS_RESET = 0 , MSPI_BUS_ERROR = 1 , MSPI_BUS_XFER_COMPLETE = 2 , MSPI_BUS_EVENT_MAX }
	MSPI bus event. More...

enum	mspi_bus_event_cb_mask { MSPI_BUS_NO_CB = 0 , MSPI_BUS_RESET_CB = BIT(0) , MSPI_BUS_ERROR_CB = BIT(1) , MSPI_BUS_XFER_COMPLETE_CB = BIT(2) }
	MSPI bus event callback mask This is a preliminary list same as mspi_bus_event. More...

enum	mspi_xfer_mode { MSPI_PIO , MSPI_DMA }
	MSPI transfer modes. More...

enum	mspi_xfer_direction { MSPI_RX , MSPI_TX }
	MSPI transfer directions. More...

enum	mspi_dev_cfg_mask { MSPI_DEVICE_CONFIG_NONE = 0 , MSPI_DEVICE_CONFIG_CE_NUM = BIT(0) , MSPI_DEVICE_CONFIG_FREQUENCY = BIT(1) , MSPI_DEVICE_CONFIG_IO_MODE = BIT(2) , MSPI_DEVICE_CONFIG_DATA_RATE = BIT(3) , MSPI_DEVICE_CONFIG_CPP = BIT(4) , MSPI_DEVICE_CONFIG_ENDIAN = BIT(5) , MSPI_DEVICE_CONFIG_CE_POL = BIT(6) , MSPI_DEVICE_CONFIG_DQS = BIT(7) , MSPI_DEVICE_CONFIG_RX_DUMMY = BIT(8) , MSPI_DEVICE_CONFIG_TX_DUMMY = BIT(9) , MSPI_DEVICE_CONFIG_READ_CMD = BIT(10) , MSPI_DEVICE_CONFIG_WRITE_CMD = BIT(11) , MSPI_DEVICE_CONFIG_CMD_LEN = BIT(12) , MSPI_DEVICE_CONFIG_ADDR_LEN = BIT(13) , MSPI_DEVICE_CONFIG_MEM_BOUND = BIT(14) , MSPI_DEVICE_CONFIG_BREAK_TIME = BIT(15) , MSPI_DEVICE_CONFIG_ALL = BIT_MASK(16) }
	MSPI controller device specific configuration mask. More...

enum	mspi_xip_permit { MSPI_XIP_READ_WRITE = 0 , MSPI_XIP_READ_ONLY = 1 }
	MSPI XIP access permissions. More...

Detailed Description

MSPI Driver APIs.

Typedef Documentation

◆ mspi_api_config

typedef int(* mspi_api_config) (const struct mspi_dt_spec *spec)

#include <zephyr/drivers/mspi.h>

MSPI driver API definition and system call entry points.

◆ mspi_api_dev_config

typedef int(* mspi_api_dev_config) (const struct device *controller, const struct mspi_dev_id *dev_id, const enum mspi_dev_cfg_mask param_mask, const struct mspi_dev_cfg *cfg)

#include <zephyr/drivers/mspi.h>

◆ mspi_api_get_channel_status

typedef int(* mspi_api_get_channel_status) (const struct device *controller, uint8_t ch)

#include <zephyr/drivers/mspi.h>

◆ mspi_api_register_callback

typedef int(* mspi_api_register_callback) (const struct device *controller, const struct mspi_dev_id *dev_id, const enum mspi_bus_event evt_type, mspi_callback_handler_t cb, struct mspi_callback_context *ctx)

#include <zephyr/drivers/mspi.h>

◆ mspi_api_scramble_config

typedef int(* mspi_api_scramble_config) (const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_scramble_cfg *scramble_cfg)

#include <zephyr/drivers/mspi.h>

◆ mspi_api_timing_config

typedef int(* mspi_api_timing_config) (const struct device *controller, const struct mspi_dev_id *dev_id, const uint32_t param_mask, void *timing_cfg)

#include <zephyr/drivers/mspi.h>

◆ mspi_api_transceive

typedef int(* mspi_api_transceive) (const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_xfer *req)

#include <zephyr/drivers/mspi.h>

◆ mspi_api_xip_config

typedef int(* mspi_api_xip_config) (const struct device *controller, const struct mspi_dev_id *dev_id, const struct mspi_xip_cfg *xip_cfg)

#include <zephyr/drivers/mspi.h>

Enumeration Type Documentation

◆ mspi_bus_event

enum mspi_bus_event

#include <zephyr/drivers/mspi.h>

MSPI bus event.

This is a preliminary list of events. I encourage the community to fill it up.

Enumerator
MSPI_BUS_RESET
MSPI_BUS_ERROR
MSPI_BUS_XFER_COMPLETE
MSPI_BUS_EVENT_MAX

◆ mspi_bus_event_cb_mask

enum mspi_bus_event_cb_mask

#include <zephyr/drivers/mspi.h>

MSPI bus event callback mask This is a preliminary list same as mspi_bus_event.

I encourage the community to fill it up.

Enumerator
MSPI_BUS_NO_CB
MSPI_BUS_RESET_CB
MSPI_BUS_ERROR_CB
MSPI_BUS_XFER_COMPLETE_CB

◆ mspi_ce_polarity

enum mspi_ce_polarity

#include <zephyr/drivers/mspi.h>

MSPI chip enable polarity.

Enumerator
MSPI_CE_ACTIVE_LOW
MSPI_CE_ACTIVE_HIGH

◆ mspi_cpp_mode

enum mspi_cpp_mode

#include <zephyr/drivers/mspi.h>

MSPI Polarity & Phase Modes.

Enumerator
MSPI_CPP_MODE_0
MSPI_CPP_MODE_1
MSPI_CPP_MODE_2
MSPI_CPP_MODE_3

◆ mspi_data_rate

enum mspi_data_rate

#include <zephyr/drivers/mspi.h>

MSPI data rate capabilities SINGLE stands for single data rate for all phases.

DUAL stands for dual data rate for all phases. S_S_D stands for single data rate for command and address phases but dual data rate for data phase. S_D_D stands for single data rate for command phase but dual data rate for address and data phases.

Enumerator
MSPI_DATA_RATE_SINGLE
MSPI_DATA_RATE_S_S_D
MSPI_DATA_RATE_S_D_D
MSPI_DATA_RATE_DUAL
MSPI_DATA_RATE_MAX

◆ mspi_dev_cfg_mask

enum mspi_dev_cfg_mask

#include <zephyr/drivers/mspi.h>

MSPI controller device specific configuration mask.

Enumerator
MSPI_DEVICE_CONFIG_NONE
MSPI_DEVICE_CONFIG_CE_NUM
MSPI_DEVICE_CONFIG_FREQUENCY
MSPI_DEVICE_CONFIG_IO_MODE
MSPI_DEVICE_CONFIG_DATA_RATE
MSPI_DEVICE_CONFIG_CPP
MSPI_DEVICE_CONFIG_ENDIAN
MSPI_DEVICE_CONFIG_CE_POL
MSPI_DEVICE_CONFIG_DQS
MSPI_DEVICE_CONFIG_RX_DUMMY
MSPI_DEVICE_CONFIG_TX_DUMMY
MSPI_DEVICE_CONFIG_READ_CMD
MSPI_DEVICE_CONFIG_WRITE_CMD
MSPI_DEVICE_CONFIG_CMD_LEN
MSPI_DEVICE_CONFIG_ADDR_LEN
MSPI_DEVICE_CONFIG_MEM_BOUND
MSPI_DEVICE_CONFIG_BREAK_TIME
MSPI_DEVICE_CONFIG_ALL

◆ mspi_duplex

enum mspi_duplex

#include <zephyr/drivers/mspi.h>

MSPI duplex mode.

Enumerator
MSPI_HALF_DUPLEX
MSPI_FULL_DUPLEX

◆ mspi_endian

enum mspi_endian

#include <zephyr/drivers/mspi.h>

MSPI Endian.

Enumerator
MSPI_XFER_LITTLE_ENDIAN
MSPI_XFER_BIG_ENDIAN

◆ mspi_io_mode

enum mspi_io_mode

#include <zephyr/drivers/mspi.h>

MSPI I/O mode capabilities Postfix like 1_4_4 stands for the number of lines used for command, address and data phases.

Mode with no postfix has the same number of lines for all phases.

Enumerator
MSPI_IO_MODE_SINGLE
MSPI_IO_MODE_DUAL
MSPI_IO_MODE_DUAL_1_1_2
MSPI_IO_MODE_DUAL_1_2_2
MSPI_IO_MODE_QUAD
MSPI_IO_MODE_QUAD_1_1_4
MSPI_IO_MODE_QUAD_1_4_4
MSPI_IO_MODE_OCTAL
MSPI_IO_MODE_OCTAL_1_1_8
MSPI_IO_MODE_OCTAL_1_8_8
MSPI_IO_MODE_HEX
MSPI_IO_MODE_HEX_8_8_16
MSPI_IO_MODE_HEX_8_16_16
MSPI_IO_MODE_MAX