mipi_dbi.h File Reference

Go to the source code of this file.

Macros
#define	MIPI_DBI_MODE_SPI_3WIRE   0x1
	SPI 3 wire (Type C1).
#define	MIPI_DBI_MODE_SPI_4WIRE   0x2
	SPI 4 wire (Type C3).
#define	MIPI_DBI_MODE_6800_BUS_16_BIT   0x3
	Parallel Bus protocol for MIPI DBI Type A based on Motorola 6800 bus.
#define	MIPI_DBI_MODE_6800_BUS_9_BIT   0x4
#define	MIPI_DBI_MODE_6800_BUS_8_BIT   0x5
#define	MIPI_DBI_MODE_8080_BUS_16_BIT   0x6
	Parallel Bus protocol for MIPI DBI Type B based on Intel 8080 bus.
#define	MIPI_DBI_MODE_8080_BUS_9_BIT   0x7
#define	MIPI_DBI_MODE_8080_BUS_8_BIT   0x8
#define	MIPI_DBI_TE_NO_EDGE   0x0
	MIPI DBI tearing enable synchronization is disabled.
#define	MIPI_DBI_TE_RISING_EDGE   0x1
	MIPI DBI tearing enable synchronization on rising edge of TE signal.
#define	MIPI_DBI_TE_FALLING_EDGE   0x2
	MIPI DBI tearing enable synchronization on falling edge of TE signal.
#define	MIPI_DBI_SPI_XFR_8BIT   8
	SPI transfer of DBI commands as 8-bit blocks, the default behaviour in SPI 4 wire (Type C3) mode.
#define	MIPI_DBI_SPI_XFR_16BIT   16
	SPI transfer of DBI commands as 16-bit blocks, a rare and seldom behaviour in SPI 4 wire (Type C3) mode.