MIPI-DBI driver APIs . More...

Data Structures
struct	mipi_dbi_config
	MIPI DBI controller configuration. More...

struct	mipi_dbi_driver_api
	MIPI-DBI host driver API. More...

Macros
#define	MIPI_DBI_SPI_CONFIG_DT(node_id, operation_, delay_)
	initialize a MIPI DBI SPI configuration struct from devicetree

#define	MIPI_DBI_SPI_CONFIG_DT_INST(inst, operation_, delay_)
	Initialize a MIPI DBI SPI configuration from devicetree instance.

#define	MIPI_DBI_CONFIG_DT(node_id, operation_, delay_)
	Initialize a MIPI DBI configuration from devicetree.

#define	MIPI_DBI_CONFIG_DT_INST(inst, operation_, delay_)
	Initialize a MIPI DBI configuration from device instance.

#define	MIPI_DBI_TE_MODE_DT(node_id, edge_prop)
	Get the MIPI DBI TE mode from devicetree.

#define	MIPI_DBI_TE_MODE_DT_INST(inst, edge_prop)
	Get the MIPI DBI TE mode for device instance.

#define	MIPI_DBI_MODE_SPI_3WIRE 0x1
	SPI 3 wire (Type C1).

#define	MIPI_DBI_MODE_SPI_4WIRE 0x2
	SPI 4 wire (Type C3).

#define	MIPI_DBI_MODE_6800_BUS_16_BIT 0x3
	Parallel Bus protocol for MIPI DBI Type A based on Motorola 6800 bus.

#define	MIPI_DBI_MODE_6800_BUS_9_BIT 0x4

#define	MIPI_DBI_MODE_6800_BUS_8_BIT 0x5

#define	MIPI_DBI_MODE_8080_BUS_16_BIT 0x6
	Parallel Bus protocol for MIPI DBI Type B based on Intel 8080 bus.

#define	MIPI_DBI_MODE_8080_BUS_9_BIT 0x7

#define	MIPI_DBI_MODE_8080_BUS_8_BIT 0x8

#define	MIPI_DBI_TE_NO_EDGE 0x0
	MIPI DBI tearing enable synchronization is disabled.

#define	MIPI_DBI_TE_RISING_EDGE 0x1
	MIPI DBI tearing enable synchronization on rising edge of TE signal.

#define	MIPI_DBI_TE_FALLING_EDGE 0x2
	MIPI DBI tearing enable synchronization on falling edge of TE signal.

#define	MIPI_DBI_SPI_XFR_8BIT 8
	SPI transfer of DBI commands as 8-bit blocks, the default behaviour in SPI 4 wire (Type C3) mode.

#define	MIPI_DBI_SPI_XFR_16BIT 16
	SPI transfer of DBI commands as 16-bit blocks, a rare and seldom behaviour in SPI 4 wire (Type C3) mode.

Functions
static int	mipi_dbi_command_write (const struct device dev, const struct mipi_dbi_config config, uint8_t cmd, const uint8_t *data, size_t len)
	Write a command to the display controller.

static int	mipi_dbi_command_read (const struct device dev, const struct mipi_dbi_config config, uint8_t cmds, size_t num_cmd, uint8_t response, size_t len)
	Read a command response from the display controller.

static int	mipi_dbi_write_display (const struct device dev, const struct mipi_dbi_config config, const uint8_t framebuf, struct display_buffer_descriptor desc, enum display_pixel_format pixfmt)
	Write a display buffer to the display controller.

static int	mipi_dbi_reset (const struct device *dev, uint32_t delay_ms)
	Resets attached display controller.

static int	mipi_dbi_release (const struct device dev, const struct mipi_dbi_config config)
	Releases a locked MIPI DBI device.

static int	mipi_dbi_configure_te (const struct device *dev, uint8_t edge, uint32_t delay_us)
	Configures MIPI DBI tearing effect signal.

Detailed Description

MIPI-DBI driver APIs .

Since: 3.6

Version: 0.1.0

Macro Definition Documentation

◆ MIPI_DBI_CONFIG_DT

#define MIPI_DBI_CONFIG_DT	(	node_id,
		operation_,
		delay_ )

#include <zephyr/drivers/mipi_dbi.h>

Value:

        {                                                               \
                .mode = DT_STRING_UPPER_TOKEN(node_id, mipi_mode),      \
                .config = MIPI_DBI_SPI_CONFIG_DT(node_id, operation_, delay_), \
        }

Initialize a MIPI DBI configuration from devicetree.

This helper allows drivers to initialize a MIPI DBI configuration structure from devicetree. It sets the MIPI DBI mode, as well as configuration fields in the SPI configuration structure

Parameters

node_id	Devicetree node identifier for the MIPI DBI device to initialize
operation_	the desired operation field in the struct spi_config
delay_	the desired delay field in the struct spi_config's spi_cs_control, if there is one

◆ MIPI_DBI_CONFIG_DT_INST

#define MIPI_DBI_CONFIG_DT_INST	(	inst,
		operation_,
		delay_ )

#include <zephyr/drivers/mipi_dbi.h>

Value:

MIPI_DBI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_)

DT_DRV_INST

#define DT_DRV_INST(inst)

Node identifier for an instance of a DT_DRV_COMPAT compatible.

Definition devicetree.h:3869

MIPI_DBI_CONFIG_DT

#define MIPI_DBI_CONFIG_DT(node_id, operation_, delay_)

Initialize a MIPI DBI configuration from devicetree.

Definition mipi_dbi.h:97

Initialize a MIPI DBI configuration from device instance.

Equivalent to MIPI_DBI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_)

Parameters

inst	Instance of the device to initialize a MIPI DBI configuration for
operation_	the desired operation field in the struct spi_config
delay_	the desired delay field in the struct spi_config's spi_cs_control, if there is one

◆ MIPI_DBI_MODE_6800_BUS_16_BIT

#define MIPI_DBI_MODE_6800_BUS_16_BIT 0x3

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

Parallel Bus protocol for MIPI DBI Type A based on Motorola 6800 bus.

         -.   .--------.      .------------------------
CS        '---'        '---'

         -------------------------------------------
RESX

              .--------------------------------
D/CX     ----------'


R/WX     -------------------------------------------

         -------------------------------------------
E

          .--------.   .--------------------------.
D[15:0]/ -| COMMAND|---|  DATA                    |
D[8:0]/   '--------'   '--------------------------'
D[7:0]

Please refer to the MIPI DBI specification for a detailed cycle diagram.

◆ MIPI_DBI_MODE_6800_BUS_8_BIT

#define MIPI_DBI_MODE_6800_BUS_8_BIT 0x5

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

◆ MIPI_DBI_MODE_6800_BUS_9_BIT

#define MIPI_DBI_MODE_6800_BUS_9_BIT 0x4

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

◆ MIPI_DBI_MODE_8080_BUS_16_BIT

#define MIPI_DBI_MODE_8080_BUS_16_BIT 0x6

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

Parallel Bus protocol for MIPI DBI Type B based on Intel 8080 bus.

         -.                                  .-
CS        '---------------------------------------'

         -------------------------------------------
RESX

         --.              .----------------------------
D/CX       '-----------'

         ---.   .--------.   .----------------------
WRX         '---'   '---'

         -------------------------------------------
RDX

            .--------.   .--------------------------.
D[15:0]/ ---| COMMAND|---|  DATA                    |
D[8:0]/     '--------'   '--------------------------'
D[7:0]

Please refer to the MIPI DBI specification for a detailed cycle diagram.

◆ MIPI_DBI_MODE_8080_BUS_8_BIT

#define MIPI_DBI_MODE_8080_BUS_8_BIT 0x8

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

◆ MIPI_DBI_MODE_8080_BUS_9_BIT

#define MIPI_DBI_MODE_8080_BUS_9_BIT 0x7

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

◆ MIPI_DBI_MODE_SPI_3WIRE

#define MIPI_DBI_MODE_SPI_3WIRE 0x1

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

SPI 3 wire (Type C1).

Uses 9 write clocks to send a byte of data. The bit sent on the 9th clock indicates whether the byte is a command or data byte

      .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-
SCK  -' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-'

     -.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.-
DOUT  |D/C| D7| D6| D5| D4| D3| D2| D1| D0|D/C| D7| D6| D5| D4|...|
     -'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'-
      | Word 1                            | Word n

     -.                                                              .-
CS    '-----------------------------------------------------------'

◆ MIPI_DBI_MODE_SPI_4WIRE

#define MIPI_DBI_MODE_SPI_4WIRE 0x2

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

SPI 4 wire (Type C3).

Uses 8 write clocks to send a byte of data. an additional C/D pin will be use to indicate whether the byte is a command or data byte

      .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-.
SCK  -' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '---

     -.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.-
DOUT  | D7| D6| D5| D4| D3| D2| D1| D0| D7| D6| D5| D4| D3| D2| D1| D0|
     -'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'-
      | Word 1                        | Word n

     -.                                                                  .-
CS    '---------------------------------------------------------------'

     -.-------------------------------.-------------------------------.-
CD    |             D/C               |             D/C               |
     -'-------------------------------'-------------------------------'-

◆ MIPI_DBI_SPI_CONFIG_DT

#define MIPI_DBI_SPI_CONFIG_DT	(	node_id,
		operation_,
		delay_ )

#include <zephyr/drivers/mipi_dbi.h>

Value:

        {                                                               \
                .frequency = DT_PROP(node_id, mipi_max_frequency),      \
                .operation = (operation_) |                             \
                        DT_PROP_OR(node_id, duplex, 0) |                        \
                        COND_CODE_1(DT_PROP(node_id, mipi_cpol), SPI_MODE_CPOL, (0)) |  \
                        COND_CODE_1(DT_PROP(node_id, mipi_cpha), SPI_MODE_CPHA, (0)) |  \
                        COND_CODE_1(DT_PROP(node_id, mipi_hold_cs), SPI_HOLD_ON_CS, (0)),       \
                .slave = DT_REG_ADDR(node_id),                          \
                .cs = {                                                 \
                        .gpio = GPIO_DT_SPEC_GET_BY_IDX_OR(DT_PHANDLE(DT_PARENT(node_id), \
                                                           spi_dev), cs_gpios, \
                                                           DT_REG_ADDR_RAW(node_id), \
                                                           {}),         \
                        .delay = (delay_),                              \
                },                                                      \
        }

initialize a MIPI DBI SPI configuration struct from devicetree

This helper allows drivers to initialize a MIPI DBI SPI configuration structure using devicetree.

Parameters

node_id	Devicetree node identifier for the MIPI DBI device whose struct spi_config to create an initializer for
operation_	the desired operation field in the struct spi_config
delay_	the desired delay field in the struct spi_config's spi_cs_control, if there is one

◆ MIPI_DBI_SPI_CONFIG_DT_INST

#define MIPI_DBI_SPI_CONFIG_DT_INST	(	inst,
		operation_,
		delay_ )

#include <zephyr/drivers/mipi_dbi.h>

Value:

MIPI_DBI_SPI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_)

Initialize a MIPI DBI SPI configuration from devicetree instance.

This helper initializes a MIPI DBI SPI configuration from a devicetree instance. It is equivalent to MIPI_DBI_SPI_CONFIG_DT(DT_DRV_INST(inst))

Parameters

inst	Instance number to initialize configuration from
operation_	the desired operation field in the struct spi_config
delay_	the desired delay field in the struct spi_config's spi_cs_control, if there is one

◆ MIPI_DBI_SPI_XFR_16BIT

#define MIPI_DBI_SPI_XFR_16BIT 16

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

SPI transfer of DBI commands as 16-bit blocks, a rare and seldom behaviour in SPI 4 wire (Type C3) mode.

The corresponding clocking diagram is slightly different to the illustration of Type C3.

      .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-.
SCK  -' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '---

     -.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.-
DOUT  |D15|D14|D13|D12|D11|D10| D9| D8| D7| D6| D5| D4| D3| D2| D1| D0|
     -'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'-
      | Word 1             (stuffing) :                        (byte) |

     -.                                                                  .-
CS    '---------------------------------------------------------------'

     -.---------------------------------------------------------------.-
CD    |                              D/C                              |
     -'---------------------------------------------------------------'-

◆ MIPI_DBI_SPI_XFR_8BIT

#define MIPI_DBI_SPI_XFR_8BIT 8

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

SPI transfer of DBI commands as 8-bit blocks, the default behaviour in SPI 4 wire (Type C3) mode.

The clocking diagram corresponds exactly to the illustration of Type C3.

◆ MIPI_DBI_TE_FALLING_EDGE

#define MIPI_DBI_TE_FALLING_EDGE 0x2

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

MIPI DBI tearing enable synchronization on falling edge of TE signal.

The controller will only send display write data on a falling edge of TE. This should be used when the controller sends a frame worth of data data to the display panel slower than the display panel can read a frame from its RAM. TE synchronization in this mode will only work if the controller can complete the write before the display panel completes 2 read cycles, otherwise the read pointer will "catch up" with the write pointer.

              .------.                        .------.
TE       -----'      '------------------------'      '-------------
         ------------.                                       .-----
CS                   '---------------------------------------'

◆ MIPI_DBI_TE_MODE_DT

#define MIPI_DBI_TE_MODE_DT	(		node_id,
			edge_prop )

#include <zephyr/drivers/mipi_dbi.h>

Value:

DT_STRING_UPPER_TOKEN(node_id, edge_prop)

Get the MIPI DBI TE mode from devicetree.

Gets the MIPI DBI TE mode from a devicetree property.

Parameters

node_id	Devicetree node identifier for the MIPI DBI device with the TE mode property
edge_prop	Property name for the TE mode that should be read from devicetree

◆ MIPI_DBI_TE_MODE_DT_INST

#define MIPI_DBI_TE_MODE_DT_INST	(		inst,
			edge_prop )

#include <zephyr/drivers/mipi_dbi.h>

Value:

DT_STRING_UPPER_TOKEN(DT_DRV_INST(inst), edge_prop)

Get the MIPI DBI TE mode for device instance.

Gets the MIPI DBI TE mode from a devicetree property. Equivalent to MIPI_DBI_TE_MODE_DT(DT_DRV_INST(inst), edge_mode).

Parameters

inst	Instance of the device to get the TE mode for
edge_prop	Property name for the TE mode that should be read from devicetree

◆ MIPI_DBI_TE_NO_EDGE

#define MIPI_DBI_TE_NO_EDGE 0x0

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

MIPI DBI tearing enable synchronization is disabled.

◆ MIPI_DBI_TE_RISING_EDGE

#define MIPI_DBI_TE_RISING_EDGE 0x1

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

MIPI DBI tearing enable synchronization on rising edge of TE signal.

The controller will only send display write data on a rising edge of TE. This should be used when the controller can send a frame worth of data data to the display panel faster than the display panel can read a frame from its RAM

              .------.                        .------.
TE       -----'      '------------------------'      '-------------
         -----.        .----------------------.
CS            '--------'                      '--------------------

Function Documentation

◆ mipi_dbi_command_read()

static int mipi_dbi_command_read	(	const struct device *	dev,
		const struct mipi_dbi_config *	config,
		uint8_t *	cmds,
		size_t	num_cmd,
		uint8_t *	response,
		size_t	len )

inlinestatic

#include <zephyr/drivers/mipi_dbi.h>

Read a command response from the display controller.

Reads a command response from the display controller.

Parameters

dev	mipi dbi controller
config	MIPI DBI configuration
cmds	array of one byte commands to send to display controller
num_cmd	number of commands to write to display controller
response	response buffer, filled with display controller response
len	size of response buffer in bytes.

Return values

0	command read succeeded
-EIO	I/O error
-ETIMEDOUT	transfer timed out
-EBUSY	controller is busy
-ENOSYS	not implemented

◆ mipi_dbi_command_write()

static int mipi_dbi_command_write	(	const struct device *	dev,
		const struct mipi_dbi_config *	config,
		uint8_t	cmd,
		const uint8_t *	data,
		size_t	len )

inlinestatic

#include <zephyr/drivers/mipi_dbi.h>

Write a command to the display controller.

Writes a command, along with an optional data buffer to the display. If data buffer and buffer length are NULL and 0 respectively, then only a command will be sent. Note that if the SPI configuration passed to this function locks the SPI bus, it is the caller's responsibility to release it with mipi_dbi_release()

Parameters

dev	mipi dbi controller
config	MIPI DBI configuration
cmd	command to write to display controller
data	optional data buffer to write after command
len	size of data buffer in bytes. Set to 0 to skip sending data.

Return values

0	command write succeeded
-EIO	I/O error
-ETIMEDOUT	transfer timed out
-EBUSY	controller is busy
-ENOSYS	not implemented

◆ mipi_dbi_configure_te()

static int mipi_dbi_configure_te	(	const struct device *	dev,
		uint8_t	edge,
		uint32_t	delay_us )

inlinestatic

#include <zephyr/drivers/mipi_dbi.h>

Configures MIPI DBI tearing effect signal.

Many displays provide a tearing effect signal, which can be configured to pulse at each vsync interval or each hsync interval. This signal can be used by the MCU to determine when to transmit a new frame so that the read pointer of the display never overlaps with the write pointer from the MCU. This function configures the MIPI DBI controller to delay transmitting display frames until the selected tearing effect signal edge occurs.

The delay will occur on the on each call to mipi_dbi_write_display where the frame_incomplete flag was set within the buffer descriptor provided with the prior call, as this indicates the buffer being written in this call is the first buffer of a new frame.

Note that most display controllers will need to enable the TE signal using vendor specific commands before the MIPI DBI controller can react to it.

Parameters

dev	mipi dbi controller
edge	which edge of the TE signal to start transmitting on
delay_us	how many microseconds after TE edge to start transmission

Return values

-EIO	I/O error
-ENOSYS	not implemented
-ENOTSUP	not supported

◆ mipi_dbi_release()

static int mipi_dbi_release	(	const struct device *	dev,
		const struct mipi_dbi_config *	config )

inlinestatic

#include <zephyr/drivers/mipi_dbi.h>

Releases a locked MIPI DBI device.

Releases a lock on a MIPI DBI device and/or the device's CS line if and only if the given config parameter was the last one to be used in any of the above functions, and if it has the SPI_LOCK_ON bit set and/or the SPI_HOLD_ON_CS bit set into its operation bits field. This lock functions exactly like the SPI lock, and can be used if the caller needs to keep CS asserted for multiple transactions, or the MIPI DBI device locked.

Parameters

dev	mipi dbi controller
config	MIPI DBI configuration

Return values

0	reset succeeded
-EIO	I/O error
-ENOSYS	not implemented
-ENOTSUP	not supported

◆ mipi_dbi_reset()

static int mipi_dbi_reset	(	const struct device *	dev,
		uint32_t	delay_ms )

inlinestatic

#include <zephyr/drivers/mipi_dbi.h>

Resets attached display controller.

Resets the attached display controller.

Parameters

dev	mipi dbi controller
delay_ms	duration to set reset signal for, in milliseconds

Return values

0	reset succeeded
-EIO	I/O error
-ENOSYS	not implemented
-ENOTSUP	not supported

◆ mipi_dbi_write_display()

static int mipi_dbi_write_display	(	const struct device *	dev,
		const struct mipi_dbi_config *	config,
		const uint8_t *	framebuf,
		struct display_buffer_descriptor *	desc,
		enum display_pixel_format	pixfmt )

inlinestatic

#include <zephyr/drivers/mipi_dbi.h>

Write a display buffer to the display controller.

Writes a display buffer to the controller. If the controller requires a "Write memory" command before writing display data, this should be sent with mipi_dbi_command_write

Parameters

dev	mipi dbi controller
config	MIPI DBI configuration
framebuf	framebuffer to write to display
desc	descriptor of framebuffer to write. Note that the pitch must be equal to width. "buf_size" field determines how many bytes will be written.
pixfmt	pixel format of framebuffer data

Return values

0	buffer write succeeded.
-EIO	I/O error
-ETIMEDOUT	transfer timed out
-EBUSY	controller is busy
-ENOSYS	not implemented

Data Structures

Macros

Functions

Detailed Description

Macro Definition Documentation

◆ MIPI_DBI_CONFIG_DT

◆ MIPI_DBI_CONFIG_DT_INST

◆ MIPI_DBI_MODE_6800_BUS_16_BIT

◆ MIPI_DBI_MODE_6800_BUS_8_BIT

◆ MIPI_DBI_MODE_6800_BUS_9_BIT

◆ MIPI_DBI_MODE_8080_BUS_16_BIT

◆ MIPI_DBI_MODE_8080_BUS_8_BIT

◆ MIPI_DBI_MODE_8080_BUS_9_BIT

◆ MIPI_DBI_MODE_SPI_3WIRE

◆ MIPI_DBI_MODE_SPI_4WIRE

◆ MIPI_DBI_SPI_CONFIG_DT

◆ MIPI_DBI_SPI_CONFIG_DT_INST

◆ MIPI_DBI_SPI_XFR_16BIT

◆ MIPI_DBI_SPI_XFR_8BIT

◆ MIPI_DBI_TE_FALLING_EDGE

◆ MIPI_DBI_TE_MODE_DT

◆ MIPI_DBI_TE_MODE_DT_INST

◆ MIPI_DBI_TE_NO_EDGE

◆ MIPI_DBI_TE_RISING_EDGE

Function Documentation

◆ mipi_dbi_command_read()

◆ mipi_dbi_command_write()

◆ mipi_dbi_configure_te()

◆ mipi_dbi_release()

◆ mipi_dbi_reset()

◆ mipi_dbi_write_display()