Zephyr API Documentation  3.7.0-rc3
A Scalable Open Source RTOS
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i3c.h
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1/*
2 * Copyright 2022 Intel Corporation
3 * Copyright 2023 Meta Platforms, Inc. and its affiliates
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8#ifndef ZEPHYR_INCLUDE_DRIVERS_I3C_H_
9#define ZEPHYR_INCLUDE_DRIVERS_I3C_H_
10
20#include <zephyr/types.h>
21#include <zephyr/device.h>
22
27#include <zephyr/drivers/i2c.h>
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
79#define I3C_BCR_MAX_DATA_SPEED_LIMIT BIT(0)
80
82#define I3C_BCR_IBI_REQUEST_CAPABLE BIT(1)
83
91#define I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE BIT(2)
92
99#define I3C_BCR_OFFLINE_CAPABLE BIT(3)
100
107#define I3C_BCR_VIRTUAL_TARGET BIT(4)
108
116#define I3C_BCR_ADV_CAPABILITIES BIT(5)
117
119#define I3C_BCR_DEVICE_ROLE_I3C_TARGET 0U
120
122#define I3C_BCR_DEVICE_ROLE_I3C_CONTROLLER_CAPABLE 1U
123
125#define I3C_BCR_DEVICE_ROLE_SHIFT 6U
126
128#define I3C_BCR_DEVICE_ROLE_MASK (0x03U << I3C_BCR_DEVICE_ROLE_SHIFT)
129
137#define I3C_BCR_DEVICE_ROLE(bcr) \
138 (((bcr) & I3C_BCR_DEVICE_ROLE_MASK) >> I3C_BCR_DEVICE_ROLE_SHIFT)
139
162#define I3C_LVR_I2C_FM_PLUS_MODE 0
163
165#define I3C_LVR_I2C_FM_MODE 1
166
168#define I3C_LVR_I2C_MODE_SHIFT 4
169
171#define I3C_LVR_I2C_MODE_MASK BIT(4)
172
180#define I3C_LVR_I2C_MODE(lvr) \
181 (((lvr) & I3C_LVR_I2C_MODE_MASK) >> I3C_LVR_I2C_MODE_SHIFT)
182
189#define I3C_LVR_I2C_DEV_IDX_0 0
190
197#define I3C_LVR_I2C_DEV_IDX_1 1
198
205#define I3C_LVR_I2C_DEV_IDX_2 2
206
208#define I3C_LVR_I2C_DEV_IDX_SHIFT 5
209
211#define I3C_LVR_I2C_DEV_IDX_MASK (0x07U << I3C_LVR_I2C_DEV_IDX_SHIFT)
212
220#define I3C_LVR_I2C_DEV_IDX(lvr) \
221 (((lvr) & I3C_LVR_I2C_DEV_IDX_MASK) >> I3C_LVR_I2C_DEV_IDX_SHIFT)
222
231
237
244
251
254};
255
264
267
270};
271
280
283
286
289
292
295};
296
310
313
316
319
322
325
328};
329
346
349
352
355
358
361
364
367
370
373
376};
377
384/*
385 * I3C_MSG_* are I3C Message flags.
386 */
387
389#define I3C_MSG_WRITE (0U << 0U)
390
392#define I3C_MSG_READ BIT(0)
393
395#define I3C_MSG_RW_MASK BIT(0)
399#define I3C_MSG_STOP BIT(1)
400
410#define I3C_MSG_RESTART BIT(2)
411
413#define I3C_MSG_HDR BIT(3)
414
416#define I3C_MSG_NBCH BIT(4)
417
419#define I3C_MSG_HDR_MODE0 BIT(0)
420
422#define I3C_MSG_HDR_MODE1 BIT(1)
423
425#define I3C_MSG_HDR_MODE2 BIT(2)
426
428#define I3C_MSG_HDR_MODE3 BIT(3)
429
431#define I3C_MSG_HDR_MODE4 BIT(4)
432
434#define I3C_MSG_HDR_MODE5 BIT(5)
435
437#define I3C_MSG_HDR_MODE6 BIT(6)
438
440#define I3C_MSG_HDR_MODE7 BIT(7)
441
443#define I3C_MSG_HDR_DDR I3C_MSG_HDR_MODE0
444
446#define I3C_MSG_HDR_TSP I3C_MSG_HDR_MODE1
447
449#define I3C_MSG_HDR_TSL I3C_MSG_HDR_MODE2
450
452#define I3C_MSG_HDR_BT I3C_MSG_HDR_MODE3
453
475struct i3c_msg {
478
481
490
493
501
504};
505
515};
516
526
527 struct {
530
534
542};
543
555
556 union {
559
566 void *ptr;
567 };
568};
569
576struct i3c_device_desc;
577struct i3c_device_id;
579struct i3c_target_config;
580
581__subsystem struct i3c_driver_api {
589 struct i2c_driver_api i2c_api;
590
603 int (*configure)(const struct device *dev,
604 enum i3c_config_type type, void *config);
605
618 int (*config_get)(const struct device *dev,
619 enum i3c_config_type type, void *config);
620
632 int (*recover_bus)(const struct device *dev);
633
647 int (*attach_i3c_device)(const struct device *dev,
648 struct i3c_device_desc *target,
649 uint8_t addr);
650
664 int (*reattach_i3c_device)(const struct device *dev,
665 struct i3c_device_desc *target,
666 uint8_t old_dyn_addr);
667
680 int (*detach_i3c_device)(const struct device *dev,
681 struct i3c_device_desc *target);
682
695 int (*attach_i2c_device)(const struct device *dev,
696 struct i3c_i2c_device_desc *target);
697
710 int (*detach_i2c_device)(const struct device *dev,
711 struct i3c_i2c_device_desc *target);
712
724 int (*do_daa)(const struct device *dev);
725
738 int (*do_ccc)(const struct device *dev,
739 struct i3c_ccc_payload *payload);
740
753 int (*i3c_xfers)(const struct device *dev,
754 struct i3c_device_desc *target,
755 struct i3c_msg *msgs,
756 uint8_t num_msgs);
757
771 struct i3c_device_desc *(*i3c_device_find)(const struct device *dev,
772 const struct i3c_device_id *id);
773
786 int (*ibi_raise)(const struct device *dev,
787 struct i3c_ibi *request);
788
801 int (*ibi_enable)(const struct device *dev,
802 struct i3c_device_desc *target);
803
816 int (*ibi_disable)(const struct device *dev,
817 struct i3c_device_desc *target);
818
834 int (*target_register)(const struct device *dev,
835 struct i3c_target_config *cfg);
836
852 int (*target_unregister)(const struct device *dev,
853 struct i3c_target_config *cfg);
854
870 int (*target_tx_write)(const struct device *dev,
871 uint8_t *buf, uint16_t len);
872};
873
883 const uint64_t pid:48;
884};
885
894#define I3C_DEVICE_ID(pid) \
895 { \
896 .pid = pid \
897 }
898
922 sys_snode_t node;
926 const struct device * const bus;
927
929 const struct device * const dev;
930
932 const uint64_t pid:48;
933
947
958
973
974#if defined(CONFIG_I3C_USE_GROUP_ADDR) || defined(__DOXYGEN__)
983#endif /* CONFIG_I3C_USE_GROUP_ADDR */
984
1015
1023
1024 struct {
1027
1030
1034
1035 struct {
1038
1041
1045
1047 struct {
1048 union {
1057
1067 };
1068
1077
1090
1097
1103 void *controller_priv;
1106#if defined(CONFIG_I3C_USE_IBI) || defined(__DOXYGEN__)
1111#endif /* CONFIG_I3C_USE_IBI */
1112};
1113
1133 sys_snode_t node;
1137 const struct device *bus;
1138
1141
1157
1163 void *controller_priv;
1165};
1166
1183
1184 struct {
1189
1195};
1196
1209 struct i3c_device_desc * const i3c;
1210
1214 struct i3c_i2c_device_desc * const i2c;
1215
1220
1225};
1226
1235};
1236
1244
1247};
1248
1261struct i3c_device_desc *i3c_dev_list_find(const struct i3c_dev_list *dev_list,
1262 const struct i3c_device_id *id);
1263
1277 uint8_t addr);
1278
1292 uint16_t addr);
1293
1308
1361 const struct i3c_dev_list *dev_list,
1362 uint64_t pid, bool must_match,
1363 bool assigned_okay,
1364 struct i3c_device_desc **target,
1365 uint8_t *addr);
1366
1380static inline int i3c_configure(const struct device *dev,
1381 enum i3c_config_type type, void *config)
1382{
1383 const struct i3c_driver_api *api =
1384 (const struct i3c_driver_api *)dev->api;
1385
1386 if (api->configure == NULL) {
1387 return -ENOSYS;
1388 }
1389
1390 return api->configure(dev, type, config);
1391}
1392
1413static inline int i3c_config_get(const struct device *dev,
1414 enum i3c_config_type type, void *config)
1415{
1416 const struct i3c_driver_api *api =
1417 (const struct i3c_driver_api *)dev->api;
1418
1419 if (api->config_get == NULL) {
1420 return -ENOSYS;
1421 }
1422
1423 return api->config_get(dev, type, config);
1424}
1425
1436static inline int i3c_recover_bus(const struct device *dev)
1437{
1438 const struct i3c_driver_api *api =
1439 (const struct i3c_driver_api *)dev->api;
1440
1441 if (api->recover_bus == NULL) {
1442 return -ENOSYS;
1443 }
1444
1445 return api->recover_bus(dev);
1446}
1447
1468
1493int i3c_reattach_i3c_device(struct i3c_device_desc *target, uint8_t old_dyn_addr);
1494
1515
1535
1554
1578static inline int i3c_do_daa(const struct device *dev)
1579{
1580 const struct i3c_driver_api *api =
1581 (const struct i3c_driver_api *)dev->api;
1582
1583 if (api->do_daa == NULL) {
1584 return -ENOSYS;
1585 }
1586
1587 return api->do_daa(dev);
1588}
1589
1603__syscall int i3c_do_ccc(const struct device *dev,
1604 struct i3c_ccc_payload *payload);
1605
1606static inline int z_impl_i3c_do_ccc(const struct device *dev,
1607 struct i3c_ccc_payload *payload)
1608{
1609 const struct i3c_driver_api *api =
1610 (const struct i3c_driver_api *)dev->api;
1611
1612 if (api->do_ccc == NULL) {
1613 return -ENOSYS;
1614 }
1615
1616 return api->do_ccc(dev, payload);
1617}
1618
1650__syscall int i3c_transfer(struct i3c_device_desc *target,
1651 struct i3c_msg *msgs, uint8_t num_msgs);
1652
1653static inline int z_impl_i3c_transfer(struct i3c_device_desc *target,
1654 struct i3c_msg *msgs, uint8_t num_msgs)
1655{
1656 const struct i3c_driver_api *api =
1657 (const struct i3c_driver_api *)target->bus->api;
1658
1659 return api->i3c_xfers(target->bus, target, msgs, num_msgs);
1660}
1661
1678static inline
1680 const struct i3c_device_id *id)
1681{
1682 const struct i3c_driver_api *api =
1683 (const struct i3c_driver_api *)dev->api;
1684
1685 if (api->i3c_device_find == NULL) {
1686 return NULL;
1687 }
1688
1689 return api->i3c_device_find(dev, id);
1690}
1691
1708static inline int i3c_ibi_raise(const struct device *dev,
1709 struct i3c_ibi *request)
1710{
1711 const struct i3c_driver_api *api =
1712 (const struct i3c_driver_api *)dev->api;
1713
1714 if (api->ibi_raise == NULL) {
1715 return -ENOSYS;
1716 }
1717
1718 return api->ibi_raise(dev, request);
1719}
1720
1735static inline int i3c_ibi_enable(struct i3c_device_desc *target)
1736{
1737 const struct i3c_driver_api *api =
1738 (const struct i3c_driver_api *)target->bus->api;
1739
1740 if (api->ibi_enable == NULL) {
1741 return -ENOSYS;
1742 }
1743
1744 return api->ibi_enable(target->bus, target);
1745}
1746
1759static inline int i3c_ibi_disable(struct i3c_device_desc *target)
1760{
1761 const struct i3c_driver_api *api =
1762 (const struct i3c_driver_api *)target->bus->api;
1763
1764 if (api->ibi_disable == NULL) {
1765 return -ENOSYS;
1766 }
1767
1768 return api->ibi_disable(target->bus, target);
1769}
1770
1782static inline int i3c_ibi_has_payload(struct i3c_device_desc *target)
1783{
1784 return (target->bcr & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE)
1786}
1787
1799static inline int i3c_device_is_ibi_capable(struct i3c_device_desc *target)
1800{
1801 return (target->bcr & I3C_BCR_IBI_REQUEST_CAPABLE)
1803}
1804
1825static inline int i3c_write(struct i3c_device_desc *target,
1826 const uint8_t *buf, uint32_t num_bytes)
1827{
1828 struct i3c_msg msg;
1829
1830 msg.buf = (uint8_t *)buf;
1831 msg.len = num_bytes;
1833 msg.hdr_cmd_code = 0;
1834
1835 return i3c_transfer(target, &msg, 1);
1836}
1837
1851static inline int i3c_read(struct i3c_device_desc *target,
1852 uint8_t *buf, uint32_t num_bytes)
1853{
1854 struct i3c_msg msg;
1855
1856 msg.buf = buf;
1857 msg.len = num_bytes;
1859 msg.hdr_cmd_code = 0;
1860
1861 return i3c_transfer(target, &msg, 1);
1862}
1863
1881static inline int i3c_write_read(struct i3c_device_desc *target,
1882 const void *write_buf, size_t num_write,
1883 void *read_buf, size_t num_read)
1884{
1885 struct i3c_msg msg[2];
1886
1887 msg[0].buf = (uint8_t *)write_buf;
1888 msg[0].len = num_write;
1889 msg[0].flags = I3C_MSG_WRITE;
1890 msg[0].hdr_cmd_code = 0;
1891
1892 msg[1].buf = (uint8_t *)read_buf;
1893 msg[1].len = num_read;
1895 msg[1].hdr_cmd_code = 0;
1896
1897 return i3c_transfer(target, msg, 2);
1898}
1899
1917static inline int i3c_burst_read(struct i3c_device_desc *target,
1918 uint8_t start_addr,
1919 uint8_t *buf,
1920 uint32_t num_bytes)
1921{
1922 return i3c_write_read(target,
1923 &start_addr, sizeof(start_addr),
1924 buf, num_bytes);
1925}
1926
1947static inline int i3c_burst_write(struct i3c_device_desc *target,
1948 uint8_t start_addr,
1949 const uint8_t *buf,
1950 uint32_t num_bytes)
1951{
1952 struct i3c_msg msg[2];
1953
1954 msg[0].buf = &start_addr;
1955 msg[0].len = 1U;
1956 msg[0].flags = I3C_MSG_WRITE;
1957 msg[0].hdr_cmd_code = 0;
1958
1959 msg[1].buf = (uint8_t *)buf;
1960 msg[1].len = num_bytes;
1961 msg[1].flags = I3C_MSG_WRITE | I3C_MSG_STOP;
1962 msg[1].hdr_cmd_code = 0;
1963
1964 return i3c_transfer(target, msg, 2);
1965}
1966
1981static inline int i3c_reg_read_byte(struct i3c_device_desc *target,
1982 uint8_t reg_addr, uint8_t *value)
1983{
1984 return i3c_write_read(target,
1985 &reg_addr, sizeof(reg_addr),
1986 value, sizeof(*value));
1987}
1988
2006static inline int i3c_reg_write_byte(struct i3c_device_desc *target,
2007 uint8_t reg_addr, uint8_t value)
2008{
2009 uint8_t tx_buf[2] = {reg_addr, value};
2010
2011 return i3c_write(target, tx_buf, 2);
2012}
2013
2032static inline int i3c_reg_update_byte(struct i3c_device_desc *target,
2033 uint8_t reg_addr, uint8_t mask,
2034 uint8_t value)
2035{
2036 uint8_t old_value, new_value;
2037 int rc;
2038
2039 rc = i3c_reg_read_byte(target, reg_addr, &old_value);
2040 if (rc != 0) {
2041 return rc;
2042 }
2043
2044 new_value = (old_value & ~mask) | (value & mask);
2045 if (new_value == old_value) {
2046 return 0;
2047 }
2048
2049 return i3c_reg_write_byte(target, reg_addr, new_value);
2050}
2051
2076void i3c_dump_msgs(const char *name, const struct i3c_msg *msgs,
2077 uint8_t num_msgs, struct i3c_device_desc *target);
2078
2096int i3c_bus_init(const struct device *dev,
2097 const struct i3c_dev_list *i3c_dev_list);
2098
2119
2120/*
2121 * This needs to be after declaration of struct i3c_driver_api,
2122 * or else compiler complains about undefined type inside
2123 * the static inline API wrappers.
2124 */
2126
2127#ifdef __cplusplus
2128}
2129#endif
2130
2135#include <zephyr/syscalls/i3c.h>
2136
2137#endif /* ZEPHYR_INCLUDE_DRIVERS_I3C_H_ */
Public APIs for the I2C drivers.
static int i3c_ibi_disable(struct i3c_device_desc *target)
Disable IBI of a target device.
Definition: i3c.h:1759
static int i3c_ibi_has_payload(struct i3c_device_desc *target)
Check if target's IBI has payload.
Definition: i3c.h:1782
static int i3c_ibi_raise(const struct device *dev, struct i3c_ibi *request)
Raise an In-Band Interrupt (IBI).
Definition: i3c.h:1708
static int i3c_device_is_ibi_capable(struct i3c_device_desc *target)
Check if device is IBI capable.
Definition: i3c.h:1799
static int i3c_ibi_enable(struct i3c_device_desc *target)
Enable IBI of a target device.
Definition: i3c.h:1735
int(* i3c_target_ibi_cb_t)(struct i3c_device_desc *target, struct i3c_ibi_payload *payload)
Function called when In-Band Interrupt received from target device.
Definition: ibi.h:151
int i3c_attach_i3c_device(struct i3c_device_desc *target)
Attach an I3C device.
#define I3C_BCR_IBI_REQUEST_CAPABLE
IBI Request Capable bit.
Definition: i3c.h:82
static struct i3c_device_desc * i3c_device_find(const struct device *dev, const struct i3c_device_id *id)
Find a registered I3C target device.
Definition: i3c.h:1679
i3c_sdr_target_error_codes
I3C SDR Target Error Codes.
Definition: i3c.h:340
static int i3c_configure(const struct device *dev, enum i3c_config_type type, void *config)
Configure the I3C hardware.
Definition: i3c.h:1380
int i3c_dev_list_daa_addr_helper(struct i3c_addr_slots *addr_slots, const struct i3c_dev_list *dev_list, uint64_t pid, bool must_match, bool assigned_okay, struct i3c_device_desc **target, uint8_t *addr)
Helper function to find a usable address during ENTDAA.
i3c_config_type
Type of configuration being passed to configure function.
Definition: i3c.h:511
int i3c_attach_i2c_device(struct i3c_i2c_device_desc *target)
Attach an I2C device.
int i3c_determine_default_addr(struct i3c_device_desc *target, uint8_t *addr)
Helper function to find the default address an i3c device is attached with.
i3c_i2c_speed_type
I2C bus speed under I3C bus.
Definition: i3c.h:261
int i3c_detach_i3c_device(struct i3c_device_desc *target)
Detach I3C Device.
i3c_bus_mode
I3C bus mode.
Definition: i3c.h:228
static int i3c_recover_bus(const struct device *dev)
Attempt bus recovery on the I3C bus.
Definition: i3c.h:1436
static int i3c_config_get(const struct device *dev, enum i3c_config_type type, void *config)
Get configuration of the I3C hardware.
Definition: i3c.h:1413
int i3c_detach_i2c_device(struct i3c_i2c_device_desc *target)
Detach I2C Device.
struct i3c_i2c_device_desc * i3c_dev_list_i2c_addr_find(struct i3c_dev_attached_list *dev_list, uint16_t addr)
Find a I2C target device descriptor by address.
struct i3c_device_desc * i3c_dev_list_find(const struct i3c_dev_list *dev_list, const struct i3c_device_id *id)
Find a I3C target device descriptor by ID.
int i3c_bus_init(const struct device *dev, const struct i3c_dev_list *i3c_dev_list)
Generic helper function to perform bus initialization.
i3c_sdr_controller_error_codes
I3C SDR Controller Error Codes.
Definition: i3c.h:307
int i3c_do_ccc(const struct device *dev, struct i3c_ccc_payload *payload)
Send CCC to the bus.
struct i3c_device_desc * i3c_dev_list_i3c_addr_find(struct i3c_dev_attached_list *dev_list, uint8_t addr)
Find a I3C target device descriptor by dynamic address.
int i3c_device_basic_info_get(struct i3c_device_desc *target)
Get basic information from device and update device descriptor.
static int i3c_do_daa(const struct device *dev)
Perform Dynamic Address Assignment on the I3C bus.
Definition: i3c.h:1578
#define I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE
IBI Payload bit.
Definition: i3c.h:91
int i3c_reattach_i3c_device(struct i3c_device_desc *target, uint8_t old_dyn_addr)
Reattach I3C device.
i3c_data_rate
I3C data rate.
Definition: i3c.h:277
@ I3C_ERROR_TE_UNKNOWN
Unknown error (not official error code)
Definition: i3c.h:369
@ I3C_ERROR_TE6
Monitoring Error.
Definition: i3c.h:363
@ I3C_ERROR_TE4
0x7E/R missing after RESTART during Dynamic Address Arbitration
Definition: i3c.h:357
@ I3C_ERROR_TE3
Assigned Address during Dynamic Address Arbitration.
Definition: i3c.h:354
@ I3C_ERROR_TE_NONE
No error (not official error code)
Definition: i3c.h:372
@ I3C_ERROR_TE_MAX
Definition: i3c.h:374
@ I3C_ERROR_TE1
CCC Code.
Definition: i3c.h:348
@ I3C_ERROR_TE5
Transaction after detecting CCC.
Definition: i3c.h:360
@ I3C_ERROR_DBR
Dead Bus Recovery.
Definition: i3c.h:366
@ I3C_ERROR_TE2
Write Data.
Definition: i3c.h:351
@ I3C_ERROR_TE_INVALID
Definition: i3c.h:375
@ I3C_ERROR_TE0
Invalid Broadcast Address or Dynamic Address after DA assignment.
Definition: i3c.h:345
@ I3C_CONFIG_TARGET
Definition: i3c.h:513
@ I3C_CONFIG_CUSTOM
Definition: i3c.h:514
@ I3C_CONFIG_CONTROLLER
Definition: i3c.h:512
@ I3C_I2C_SPEED_INVALID
Definition: i3c.h:269
@ I3C_I2C_SPEED_MAX
Definition: i3c.h:268
@ I3C_I2C_SPEED_FMPLUS
I2C FM+ mode.
Definition: i3c.h:266
@ I3C_I2C_SPEED_FM
I2C FM mode.
Definition: i3c.h:263
@ I3C_BUS_MODE_INVALID
Definition: i3c.h:253
@ I3C_BUS_MODE_PURE
Only I3C devices are on the bus.
Definition: i3c.h:230
@ I3C_BUS_MODE_MIXED_FAST
Both I3C and legacy I2C devices are on the bus.
Definition: i3c.h:236
@ I3C_BUS_MODE_MAX
Definition: i3c.h:252
@ I3C_BUS_MODE_MIXED_LIMITED
Both I3C and legacy I2C devices are on the bus.
Definition: i3c.h:243
@ I3C_BUS_MODE_MIXED_SLOW
Both I3C and legacy I2C devices are on the bus.
Definition: i3c.h:250
@ I3C_ERROR_CE0
Transaction after sending CCC.
Definition: i3c.h:309
@ I3C_ERROR_CE2
No response to broadcast address (0x7E)
Definition: i3c.h:315
@ I3C_ERROR_CE_INVALID
Definition: i3c.h:327
@ I3C_ERROR_CE_MAX
Definition: i3c.h:326
@ I3C_ERROR_CE_UNKNOWN
Unknown error (not official error code)
Definition: i3c.h:321
@ I3C_ERROR_CE3
Failed Controller Handoff.
Definition: i3c.h:318
@ I3C_ERROR_CE1
Monitoring Error.
Definition: i3c.h:312
@ I3C_ERROR_CE_NONE
No error (not official error code)
Definition: i3c.h:324
@ I3C_DATA_RATE_MAX
Definition: i3c.h:293
@ I3C_DATA_RATE_INVALID
Definition: i3c.h:294
@ I3C_DATA_RATE_HDR_TSP
High Data Rate - Ternary Symbol for Pure Bus.
Definition: i3c.h:288
@ I3C_DATA_RATE_HDR_DDR
High Data Rate - Double Data Rate messaging.
Definition: i3c.h:282
@ I3C_DATA_RATE_SDR
Single Data Rate messaging.
Definition: i3c.h:279
@ I3C_DATA_RATE_HDR_TSL
High Data Rate - Ternary Symbol Legacy-inclusive-Bus.
Definition: i3c.h:285
@ I3C_DATA_RATE_HDR_BT
High Data Rate - Bulk Transport.
Definition: i3c.h:291
int i3c_transfer(struct i3c_device_desc *target, struct i3c_msg *msgs, uint8_t num_msgs)
Perform data transfer from the controller to a I3C target device.
#define I3C_MSG_STOP
Send STOP after this message.
Definition: i3c.h:399
static int i3c_write_read(struct i3c_device_desc *target, const void *write_buf, size_t num_write, void *read_buf, size_t num_read)
Write then read data from an I3C target device.
Definition: i3c.h:1881
static int i3c_burst_read(struct i3c_device_desc *target, uint8_t start_addr, uint8_t *buf, uint32_t num_bytes)
Read multiple bytes from an internal address of an I3C target device.
Definition: i3c.h:1917
static int i3c_reg_update_byte(struct i3c_device_desc *target, uint8_t reg_addr, uint8_t mask, uint8_t value)
Update internal register of an I3C target device.
Definition: i3c.h:2032
void i3c_dump_msgs(const char *name, const struct i3c_msg *msgs, uint8_t num_msgs, struct i3c_device_desc *target)
Dump out an I3C message.
#define I3C_MSG_READ
Read message from I3C bus.
Definition: i3c.h:392
#define I3C_MSG_WRITE
Write message to I3C bus.
Definition: i3c.h:389
static int i3c_reg_read_byte(struct i3c_device_desc *target, uint8_t reg_addr, uint8_t *value)
Read internal register of an I3C target device.
Definition: i3c.h:1981
static int i3c_write(struct i3c_device_desc *target, const uint8_t *buf, uint32_t num_bytes)
Write a set amount of data to an I3C target device.
Definition: i3c.h:1825
static int i3c_read(struct i3c_device_desc *target, uint8_t *buf, uint32_t num_bytes)
Read a set amount of data from an I3C target device.
Definition: i3c.h:1851
#define I3C_MSG_RESTART
RESTART I3C transaction for this message.
Definition: i3c.h:410
static int i3c_burst_write(struct i3c_device_desc *target, uint8_t start_addr, const uint8_t *buf, uint32_t num_bytes)
Write multiple bytes to an internal address of an I3C target device.
Definition: i3c.h:1947
static int i3c_reg_write_byte(struct i3c_device_desc *target, uint8_t reg_addr, uint8_t value)
Write internal register of an I3C target device.
Definition: i3c.h:2006
struct _slist sys_slist_t
Single-linked list structure.
Definition: slist.h:49
struct _snode sys_snode_t
Single-linked list node structure.
Definition: slist.h:39
#define ENOSYS
Function not implemented.
Definition: errno.h:82
__UINT32_TYPE__ uint32_t
Definition: stdint.h:90
__UINT64_TYPE__ uint64_t
Definition: stdint.h:91
__UINT8_TYPE__ uint8_t
Definition: stdint.h:88
__UINTPTR_TYPE__ uintptr_t
Definition: stdint.h:105
__UINT16_TYPE__ uint16_t
Definition: stdint.h:89
Runtime device structure (in ROM) per driver instance.
Definition: device.h:403
const void * api
Address of the API structure exposed by the device instance.
Definition: device.h:409
Structure to keep track of addresses on I3C bus.
Definition: addresses.h:57
Payload structure for one CCC transaction.
Definition: ccc.h:266
Configuration parameters for I3C hardware to act as controller.
Definition: i3c.h:520
struct i3c_config_controller::@167 scl
uint32_t i3c
SCL frequency (in Hz) for I3C transfers.
Definition: i3c.h:529
uint8_t supported_hdr
Bit mask of supported HDR modes (0 - 7).
Definition: i3c.h:541
bool is_secondary
True if the controller is to be the secondary controller of the bus.
Definition: i3c.h:525
uint32_t i2c
SCL frequency (in Hz) for I2C transfers.
Definition: i3c.h:532
Custom I3C configuration parameters.
Definition: i3c.h:552
void * ptr
Pointer to configuration parameter.
Definition: i3c.h:566
uint32_t id
ID of the configuration parameter.
Definition: i3c.h:554
uintptr_t val
Value of configuration parameter.
Definition: i3c.h:558
Structure for describing attached devices for a controller.
Definition: i3c.h:1175
sys_slist_t i3c
Linked list of attached I3C devices.
Definition: i3c.h:1188
sys_slist_t i2c
Linked list of attached I2C devices.
Definition: i3c.h:1193
struct i3c_dev_attached_list::@175 devices
struct i3c_addr_slots addr_slots
Address slots:
Definition: i3c.h:1182
Structure for describing known devices for a controller.
Definition: i3c.h:1205
struct i3c_i2c_device_desc *const i2c
Pointer to array of known I2C devices.
Definition: i3c.h:1214
const uint8_t num_i3c
Number of I3C devices in array.
Definition: i3c.h:1219
struct i3c_device_desc *const i3c
Pointer to array of known I3C devices.
Definition: i3c.h:1209
const uint8_t num_i2c
Number of I2C devices in array.
Definition: i3c.h:1224
Structure describing a I3C target device.
Definition: i3c.h:916
uint8_t maxwr
Maximum Write Speed.
Definition: i3c.h:1029
const uint8_t init_dynamic_addr
Initial dynamic address.
Definition: i3c.h:957
uint8_t getcap1
I3C v1.1+ GETCAPS1 (I3C_CCC_GETCAPS1_*)
Definition: i3c.h:1066
uint8_t getcap2
GETCAPS2 (I3C_CCC_GETCAPS2_*)
Definition: i3c.h:1076
uint32_t max_read_turnaround
Maximum Read turnaround time in microseconds.
Definition: i3c.h:1032
const uint8_t static_addr
Static address for this target device.
Definition: i3c.h:946
uint8_t getcap4
GETCAPS4.
Definition: i3c.h:1095
struct i3c_device_desc::@170 data_speed
struct i3c_device_desc::@172 getcaps
Describes advanced (Target) capabilities and features.
uint8_t max_ibi
Maximum IBI Payload Size.
Definition: i3c.h:1043
i3c_target_ibi_cb_t ibi_cb
Private data by the controller to aid in transactions.
Definition: i3c.h:1110
uint8_t group_addr
Group address for this target device.
Definition: i3c.h:982
uint16_t mwl
Maximum Write Length.
Definition: i3c.h:1040
uint8_t getcap3
GETCAPS3 (I3C_CCC_GETCAPS3_*)
Definition: i3c.h:1089
uint8_t dynamic_addr
Dynamic Address for this target device used for communication.
Definition: i3c.h:972
const struct device *const dev
Device driver instance of the I3C device.
Definition: i3c.h:929
struct i3c_device_desc::@171 data_length
uint16_t mrl
Maximum Read Length.
Definition: i3c.h:1037
const uint64_t pid
Device Provisioned ID.
Definition: i3c.h:932
uint8_t maxrd
Maximum Read Speed.
Definition: i3c.h:1026
uint8_t gethdrcap
I3C v1.0 HDR Capabilities (I3C_CCC_GETCAPS1_*)
Definition: i3c.h:1056
uint8_t bcr
Bus Characteristic Register (BCR)
Definition: i3c.h:1014
uint8_t dcr
Device Characteristic Register (DCR)
Definition: i3c.h:1022
const struct device *const bus
Used to attach this node onto a linked list.
Definition: i3c.h:926
Structure used for matching I3C devices.
Definition: i3c.h:881
const uint64_t pid
Device Provisioned ID.
Definition: i3c.h:883
This structure is common to all I3C drivers and is expected to be the first element in the object poi...
Definition: i3c.h:1232
struct i3c_dev_list dev_list
I3C/I2C device list struct.
Definition: i3c.h:1234
This structure is common to all I3C drivers and is expected to be the first element in the driver's s...
Definition: i3c.h:1241
struct i3c_config_controller ctrl_config
Controller Configuration.
Definition: i3c.h:1243
struct i3c_dev_attached_list attached_dev
Attached I3C/I2C devices and addresses.
Definition: i3c.h:1246
Structure describing a I2C device on I3C bus.
Definition: i3c.h:1127
const struct device * bus
Used to attach this node onto a linked list.
Definition: i3c.h:1137
const uint16_t addr
Static address for this I2C device.
Definition: i3c.h:1140
const uint8_t lvr
Legacy Virtual Register (LVR)
Definition: i3c.h:1156
Struct for IBI request.
Definition: ibi.h:57
One I3C Message.
Definition: i3c.h:475
uint8_t flags
Flags for this message.
Definition: i3c.h:492
uint8_t hdr_mode
HDR mode (I3C_MSG_HDR_MODE*) for transfer if any I3C_MSG_HDR_* is set in flags.
Definition: i3c.h:500
uint32_t num_xfer
Total number of bytes transferred.
Definition: i3c.h:489
uint8_t * buf
Data buffer in bytes.
Definition: i3c.h:477
uint8_t hdr_cmd_code
HDR command code field (7-bit) for HDR-DDR, HDR-TSP and HDR-TSL.
Definition: i3c.h:503
uint32_t len
Length of buffer in bytes.
Definition: i3c.h:480
Structure describing a device that supports the I3C target API.
Definition: target_device.h:92