infineon,autanalog-sar-adc

Description

PSOC Edge AutAnalog SAR ADC

Infineon PSOC Edge 84 AutAnalog SAR ADC

The AutAnalog (Autonomous Analog) SAR ADC provides high resolution 12-bit analog-to-digital
conversion capabilities for the PSOC Edge family of microcontrollers.

The ADC provides 12-bit resolution with a sampling rate of up to 5Msps when configured in
high performance mode.  The inputs can be configured to sample directly from GPIO analog
inputs (up to 8 channels) or through an internal mux to select from signals from other
AutAnalog peripherals (up to 16 MUX channels).

MUX channels allow sampling from CTB opamp outputs, DAC outputs, temperature sensor,
and other internal analog signals.  MUX channels are selected using
IFX_AUTANALOG_SAR_PIN_MUX_* constants from
<dt-bindings/adc/infineon-autanalog-sar.h>.

The AutAnalog SAR ADC is part of the AutAnalog subsystem, which must be set up before
initializing the ADC.  Additionally, the AutAnalog subsystem uses a shared interrupt
which handles events from all AutAnalog peripherals.

Properties

Top level properties

These property descriptions apply to “infineon,autanalog-sar-adc” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

Name	Type	Details
`#io-channel-cells`	`int`	Number of cells in an io-channel specifier This property is required. Constant value: `1`
`vref-mv`	`int`	Internal reference voltage in millivolts. Default value: `1800`
`offset-cal`	`boolean`	Enables Self-Calibration for offset correction within the ADC. If left disabled, the factory calibration for offset correction will be used.
`linear-cal`	`boolean`	Enables Self-Calibration for linearity correction within the ADC. If left disabled, the factory calibration for linearity will be used.
`vref-source`	`int`	Selects which voltage reference to use for the ADC. Use IFX_AUTANALOG_SAR_VREF_* constants from <dt-bindings/adc/infineon-autanalog-sar.h>. IFX_AUTANALOG_SAR_VREF_VDDA (0) - Vdda supply (default) IFX_AUTANALOG_SAR_VREF_EXT (1) - External reference IFX_AUTANALOG_SAR_VREF_VBGR (2) - Band-gap reference IFX_AUTANALOG_SAR_VREF_VDDA_BY_2 (3) - Vdda / 2 IFX_AUTANALOG_SAR_VREF_PRB_OUT0 (4) - PRB Vref0 IFX_AUTANALOG_SAR_VREF_PRB_OUT1 (5) - PRB Vref1 Default value: `0` Legal values: `0`, `1`, `2`, `3`, `4`, `5`
`pos-buf-pwr`	`int`	Power mode for the positive MUX input buffer. Use IFX_AUTANALOG_SAR_BUF_PWR_* constants from <dt-bindings/adc/infineon-autanalog-sar.h>. IFX_AUTANALOG_SAR_BUF_PWR_OFF (0) - Off (default) IFX_AUTANALOG_SAR_BUF_PWR_ULTRA_LOW (1) - Ultra low, charge pump off IFX_AUTANALOG_SAR_BUF_PWR_ULTRA_LOW_RAIL (2) - Ultra low, charge pump on IFX_AUTANALOG_SAR_BUF_PWR_LOW_RAIL (4) - Low, charge pump on IFX_AUTANALOG_SAR_BUF_PWR_MEDIUM_RAIL (6) - Medium, charge pump on (recommended) IFX_AUTANALOG_SAR_BUF_PWR_HIGH_RAIL (8) - High, charge pump on IFX_AUTANALOG_SAR_BUF_PWR_ULTRA_HIGH_RAIL (10) - Ultra high, charge pump on Default value: `0` Legal values: `0`, `1`, `2`, `4`, `6`, `8`, `10`
`neg-buf-pwr`	`int`	Power mode for the negative MUX input buffer. Use IFX_AUTANALOG_SAR_BUF_PWR_* constants from <dt-bindings/adc/infineon-autanalog-sar.h>. See pos-buf-pwr for valid values. Default value: `0` Legal values: `0`, `1`, `2`, `4`, `6`, `8`, `10`
`acc-mode`	`int`	Accumulator / averaging mode for the ADC. Use IFX_AUTANALOG_SAR_ACC_* constants from <dt-bindings/adc/infineon-autanalog-sar.h>. IFX_AUTANALOG_SAR_ACC_DISABLED (0) - Averaging disabled (default) IFX_AUTANALOG_SAR_ACC_ACCUNDUMP (1) - Accumulate and dump Default value: `0` Legal values: `0`, `1`
`shift-mode`	`boolean`	Set the resolution of the averaging result when averaging is performed in HW. If false (default), the result is shifted back to 12 bits. If true, the result is shifted to 16 bits.
`fifo-chan-id`	`boolean`	Enable channel number identifier for data stored in FIFO.

Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “infineon,autanalog-sar-adc” compatible.

Name	Type	Details
`reg`	`array`	Base address of the AutAnalog SAR ADC Registers This property is required. See Important properties for more information.
`#address-cells`	`int`	This property encodes the number of <u32> cells used by address fields in "reg" properties in this node's children. For details, see "2.3.5 #address-cells and #size-cells" in Devicetree Specification v0.4. Constant value: `1`
`#size-cells`	`int`	This property encodes the number of <u32> cells used by size fields in "reg" properties in this node's children. For details, see "2.3.5 #address-cells and #size-cells" in Devicetree Specification v0.4. Constant value: `0`
`status`	`string`	Indicates the operational status of the hardware or other resource that the node represents. In particular: - "okay" means the resource is operational and, for example, can be used by device drivers - "disabled" means the resource is not operational and the system should treat it as if it is not present For details, see "2.3.4 status" in Devicetree Specification v0.4. Legal values: `okay`, `disabled`, `reserved`, `fail`, `fail-sss` See Important properties for more information.
`compatible`	`string-array`	This property is a list of strings that essentially define what type of hardware or other resource this devicetree node represents. Each device driver checks for specific compatible property values to find the devicetree nodes that represent resources that the driver should manage. The recommended format is "vendor,device", The "vendor" part is an abbreviated name of the vendor. The "device" is usually from the datasheet. The compatible property can have multiple values, ordered from most- to least-specific. Having additional values is useful when the device is a specific instance of a more general family, to allow the system to match the most specific driver available. For details, see "2.3.1 compatible" in Devicetree Specification v0.4. This property is required. See Important properties for more information.
`reg-names`	`string-array`	Optional names given to each register block in the "reg" property. For example: / { soc { #address-cells = <1>; #size-cells = <1>; uart@1000 { reg = <0x1000 0x2000>, <0x3000 0x4000>; reg-names = "foo", "bar"; }; }; }; The uart@1000 node has two register blocks: - one with base address 0x1000, size 0x2000, and name "foo" - another with base address 0x3000, size 0x4000, and name "bar"
`interrupts`	`array`	Information about interrupts generated by the device, encoded as an array of one or more interrupt specifiers. The format of the data in this property varies by where the device appears in the interrupt tree. Devices with the same "interrupt-parent" will use the same format in their interrupts properties. For details, see "2.4 Interrupts and Interrupt Mapping" in Devicetree Specification v0.4. See Important properties for more information.
`interrupts-extended`	`compound`	Extended interrupt specifier for device, used as an alternative to the "interrupts" property. For details, see "2.4 Interrupts and Interrupt Mapping" in Devicetree Specification v0.4.
`interrupt-names`	`string-array`	Optional names given to each interrupt generated by a device. The interrupts themselves are defined in either "interrupts" or "interrupts-extended" properties. For details, see "2.4 Interrupts and Interrupt Mapping" in Devicetree Specification v0.4.
`interrupt-parent`	`phandle`	If present, this refers to the node which handles interrupts generated by this device. For details, see "2.4 Interrupts and Interrupt Mapping" in Devicetree Specification v0.4.
`label`	`string`	Human readable string describing the device. Use of this property is deprecated except as needed on a case-by-case basis. For details, see "4.1.2 Miscellaneous Properties" in Devicetree Specification v0.4. See Important properties for more information.
`clocks`	`phandle-array`	Information about the device's clock providers. In general, this property should follow conventions established in the dt-schema binding: https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
`clock-names`	`string-array`	Optional names given to each clock provider in the "clocks" property.
`dma-coherent`	`boolean`	Indicates that the device is capable of coherent DMA operations. For details, see "2.3.10 dma-coherent" in Devicetree Specification v0.4.
`dmas`	`phandle-array`	DMA channel specifiers relevant to the device.
`dma-names`	`string-array`	Optional names given to the DMA channel specifiers in the "dmas" property.
`io-channels`	`phandle-array`	IO channel specifiers relevant to the device.
`io-channel-names`	`string-array`	Optional names given to the IO channel specifiers in the "io-channels" property.
`mboxes`	`phandle-array`	Mailbox / IPM channel specifiers relevant to the device.
`mbox-names`	`string-array`	Optional names given to the mbox specifiers in the "mboxes" property.
`power-domains`	`phandle-array`	Power domain specifiers relevant to the device.
`power-domain-names`	`string-array`	Optional names given to the power domain specifiers in the "power-domains" property.
`#power-domain-cells`	`int`	Number of cells in power-domains property
`hwlocks`	`phandle-array`	HW spinlock id relevant to the device.
`hwlock-names`	`string-array`	Optional names given to the hwlock specifiers in the "hwlocks" property.
`zephyr,deferred-init`	`boolean`	Do not initialize device automatically on boot. Device should be manually initialized using device_init().
`wakeup-source`	`boolean`	Property to identify that a device can be used as wake up source. When this property is provided a specific flag is set into the device that tells the system that the device is capable of wake up the system. Wake up capable devices are disabled (interruptions will not wake up the system) by default but they can be enabled at runtime if necessary.
`zephyr,pm-device-runtime-auto`	`boolean`	Automatically configure the device for runtime power management after the init function runs.
`zephyr,disabling-power-states`	`phandles`	List of power states that will disable this device power.

Child node properties

Name	Type	Details
`mux-buf-bypass`	`boolean`	Bypass the Hi-Z buffers for MUX channels.
`fifo-sel`	`int`	Route this channel's conversion result to a FIFO buffer. Use IFX_AUTANALOG_SAR_FIFO_* constants from <dt-bindings/adc/infineon-autanalog-sar.h>. IFX_AUTANALOG_SAR_FIFO_DISABLED (0) - FIFO disabled (default) IFX_AUTANALOG_SAR_FIFO_0 (1) - Route to FIFO buffer 0 IFX_AUTANALOG_SAR_FIFO_1 (2) - Route to FIFO buffer 1 IFX_AUTANALOG_SAR_FIFO_2 (3) - Route to FIFO buffer 2 IFX_AUTANALOG_SAR_FIFO_3 (4) - Route to FIFO buffer 3 IFX_AUTANALOG_SAR_FIFO_4 (5) - Route to FIFO buffer 4 IFX_AUTANALOG_SAR_FIFO_5 (6) - Route to FIFO buffer 5 IFX_AUTANALOG_SAR_FIFO_6 (7) - Route to FIFO buffer 6 IFX_AUTANALOG_SAR_FIFO_7 (8) - Route to FIFO buffer 7 Default value: `0` Legal values: `0`, `1`, `2`, `3`, `4`, `5`, `6`, `7`, `8`
`reg`	`array`	Channel identifier. This property is required. See Important properties for more information.
`zephyr,gain`	`string`	Gain selection: - ADC_GAIN_1_6: x 1/6 - ADC_GAIN_1_5: x 1/5 - ADC_GAIN_1_4: x 1/4 - ADC_GAIN_2_7: x 2/7 - ADC_GAIN_1_3: x 1/3 - ADC_GAIN_2_5: x 2/5 - ADC_GAIN_1_2: x 1/2 - ADC_GAIN_2_3: x 2/3 - ADC_GAIN_4_5: x 4/5 - ADC_GAIN_1: x 1 - ADC_GAIN_2: x 2 - ADC_GAIN_3: x 3 - ADC_GAIN_4: x 4 - ADC_GAIN_6: x 6 - ADC_GAIN_8: x 8 - ADC_GAIN_12: x 12 - ADC_GAIN_16: x 16 - ADC_GAIN_24: x 24 - ADC_GAIN_32: x 32 - ADC_GAIN_64: x 64 - ADC_GAIN_128: x 128 This property is required. Legal values: `ADC_GAIN_1_6`, `ADC_GAIN_1_5`, `ADC_GAIN_1_4`, `ADC_GAIN_2_7`, `ADC_GAIN_1_3`, `ADC_GAIN_2_5`, `ADC_GAIN_1_2`, `ADC_GAIN_2_3`, `ADC_GAIN_4_5`, `ADC_GAIN_1`, `ADC_GAIN_2`, `ADC_GAIN_3`, `ADC_GAIN_4`, `ADC_GAIN_6`, `ADC_GAIN_8`, `ADC_GAIN_12`, `ADC_GAIN_16`, `ADC_GAIN_24`, `ADC_GAIN_32`, `ADC_GAIN_64`, `ADC_GAIN_128`
`zephyr,reference`	`string`	Reference selection: - ADC_REF_VDD_1: VDD - ADC_REF_VDD_1_2: VDD/2 - ADC_REF_VDD_1_3: VDD/3 - ADC_REF_VDD_1_4: VDD/4 - ADC_REF_INTERNAL: Internal - ADC_REF_EXTERNAL0: External, input 0 - ADC_REF_EXTERNAL1: External, input 1 This property is required. Legal values: `ADC_REF_VDD_1`, `ADC_REF_VDD_1_2`, `ADC_REF_VDD_1_3`, `ADC_REF_VDD_1_4`, `ADC_REF_INTERNAL`, `ADC_REF_EXTERNAL0`, `ADC_REF_EXTERNAL1`
`zephyr,vref-mv`	`int`	This property can be used to specify the voltage (in millivolts) of the reference selected for this channel, so that applications can get that value if needed for some calculations. For the internal reference, the voltage can be usually obtained with a dedicated ADC API call, so there is no need to use this property in that case, but for other references this property can be useful.
`zephyr,acquisition-time`	`int`	Acquisition time. Use the ADC_ACQ_TIME macro to compose the value for this property or pass ADC_ACQ_TIME_DEFAULT to use the default setting for a given hardware (e.g. when the hardware does not allow to configure the acquisition time). This property is required.
`zephyr,differential`	`boolean`	When set, selects differential input mode for the channel. Otherwise, single-ended mode is used unless the zephyr,input-negative property is specified, in which case the differential mode is selected implicitly.
`zephyr,input-positive`	`int`	Positive ADC input. Used only for drivers that select the ADC_CONFIGURABLE_INPUTS Kconfig option.
`zephyr,input-negative`	`int`	Negative ADC input. Used only for drivers that select the ADC_CONFIGURABLE_INPUTS Kconfig option. When specified, implies the differential input mode for the channel.
`zephyr,resolution`	`int`	ADC resolution to be used for the channel.
`zephyr,oversampling`	`int`	Oversampling setting to be used for the channel. When specified, each sample is averaged from 2^N conversion results (where N is the provided value).
`zephyr,current-source-pin`	`uint8-array`	Output pin selection for the current sources. The actual interpretation depends on the driver. This is used only for drivers which select the ADC_CONFIGURABLE_EXCITATION_CURRENT_SOURCE_PIN Kconfig option.
`zephyr,vbias-pins`	`int`	Output pin selection for the bias voltage. The actual interpretation depends on the driver. This is used only for drivers which select the ADC_CONFIGURABLE_VBIAS_PIN Kconfig option.

Specifier cell names

io-channel cells: input