nxp,lpc-mcan
Vendor: NXP Semiconductors
Note
An implementation of a driver matching this compatible is available in drivers/can/can_mcux_mcan.c.
Description
NXP LPC SoC series MCAN CAN FD controller
Properties
Top level properties
These property descriptions apply to “nxp,lpc-mcan” nodes themselves. This page also describes child node properties in the following sections.
Properties not inherited from the base binding file.
Name |
Type |
Details |
|---|---|---|
|
|
Bosch M_CAN message RAM configuration. The cells in the array have the following format:
<offset std-filter-elements ext-filter-elements rx-fifo0-elements rx-fifo1-elements
rx-buffer-elements tx-event-fifo-elements tx-buffer-elements>
The 'offset' is an address offset of the message RAM where the following elements start
from. This is normally set to 0x0 when using a non-shared message RAM. The remaining cells
specify how many elements are allocated for each filter type/FIFO/buffer.
The Bosch M_CAN IP supports the following elements:
11-bit Filter 0-128 elements / 0-128 words
29-bit Filter 0-64 elements / 0-128 words
Rx FIFO 0 0-64 elements / 0-1152 words
Rx FIFO 1 0-64 elements / 0-1152 words
Rx Buffers 0-64 elements / 0-1152 words
Tx Event FIFO 0-32 elements / 0-64 words
Tx Buffers 0-32 elements / 0-576 words
This property is required. |
|
|
Initial data phase bitrate in bit/s. If this is unset, the initial data phase bitrate is set
to CONFIG_CAN_DEFAULT_BITRATE_DATA.
|
|
|
Initial data phase sample point in per mille (e.g. 875 equals 87.5%).
If this is unset (or if it is set to 0), the initial sample point will default to 75.0% for
bitrates over 800 kbit/s, 80.0% for bitrates over 500 kbit/s, and 87.5% for all other
bitrates.
|
|
|
Initial bitrate in bit/s. If this is unset, the initial bitrate is set to
CONFIG_CAN_DEFAULT_BITRATE.
|
|
|
Initial sample point in per mille (e.g. 875 equals 87.5%).
If this is unset (or if it is set to 0), the initial sample point will default to 75.0% for
bitrates over 800 kbit/s, 80.0% for bitrates over 500 kbit/s, and 87.5% for all other
bitrates.
|
|
|
Actively controlled CAN transceiver.
Example:
transceiver0: can-phy0 {
compatible = "nxp,tja1040", "can-transceiver-gpio";
standby-gpios = <gpioa 0 GPIO_ACTIVE_HIGH>;
max-bitrate = <1000000>;
#phy-cells = <0>;
};
&can0 {
status = "okay";
phys = <&transceiver0>;
};
|
|
|
Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.
|
|
|
Pin configuration/s for the second state. See pinctrl-0.
|
|
|
Pin configuration/s for the third state. See pinctrl-0.
|
|
|
Pin configuration/s for the fourth state. See pinctrl-0.
|
|
|
Pin configuration/s for the fifth state. See pinctrl-0.
|
|
|
Names for the provided states. The number of names needs to match the
number of states.
|
|
|
Reset information
|
|
|
Name of each reset
|
Deprecated properties not inherited from the base binding file.
Name |
Type |
Details |
|---|---|---|
|
|
Deprecated. This property has been renamed to bitrate-data.
Initial data phase bitrate in bit/s. If this is unset, the initial data phase bitrate is set
to CONFIG_CAN_DEFAULT_BITRATE_DATA.
|
|
|
Deprecated. This property has been renamed to bitrate.
Initial bitrate in bit/s. If this is unset, the initial bitrate is set to
CONFIG_CAN_DEFAULT_BITRATE.
|
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “nxp,lpc-mcan” compatible.
Name |
Type |
Details |
|---|---|---|
|
|
register space
This property is required. See Important properties for more information. |
|
|
interrupts for device
This property is required. See Important properties for more information. |
|
|
name of each interrupt
This property is required. |
|
|
Clock gate information
This property is required. |
|
|
indicates the operational status of a device
Legal values: See Important properties for more information. |
|
|
compatible strings
This property is required. See Important properties for more information. |
|
|
name of each register space
|
|
|
extended interrupt specifier for device
|
|
|
phandle to interrupt controller node
|
|
|
No description provided for this label
See Important properties for more information. |
|
|
name of each clock
|
|
|
number of address cells in reg property
|
|
|
number of size cells in reg property
|
|
|
DMA channels specifiers
|
|
|
Provided names of DMA channel specifiers
|
|
|
IO channels specifiers
|
|
|
Provided names of IO channel specifiers
|
|
|
mailbox / IPM channels specifiers
|
|
|
Provided names of mailbox / IPM channel specifiers
|
|
|
Power domain specifiers
|
|
|
Provided names of power domain specifiers
|
|
|
Number of cells in power-domains property
|
|
|
Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
|
|
|
Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
|
|
|
Automatically configure the device for runtime power management after the
init function runs.
|
|
|
List of power states that will disable this device power.
|
Child node properties
Name |
Type |
Details |
|---|---|---|
|
|
The minimum bitrate supported by the CAN transceiver in bits/s.
|
|
|
The maximum bitrate supported by the CAN transceiver in bits/s.
This property is required. |