microchip,xec-pcr
Vendor: Microchip Technology Inc.
Note
An implementation of a driver matching this compatible is available in drivers/clock_control/clock_control_mchp_xec.c.
Description
Microchip XEC Power Clock Reset and VBAT register (PCR)
Properties
Properties not inherited from the base binding file.
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Type |
Details |
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Number of items to expect in a Clock specifier
This property is required. Constant value: |
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Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.
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Pin configuration/s for the second state. See pinctrl-0.
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Pin configuration/s for the third state. See pinctrl-0.
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Pin configuration/s for the fourth state. See pinctrl-0.
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Pin configuration/s for the fifth state. See pinctrl-0.
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Names for the provided states. The number of names needs to match the
number of states.
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Divide 96 MHz PLL clock to produce Cortex-M4 core clock
This property is required. |
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PWM and TACH clock domain divided down from 48 MHz AHB clock. The
default value is 480 for 100 kHz.
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32 KHz clock source for PLL
This property is required. |
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32 KHz clock source for peripherals
This property is required. |
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Use single ended crystal connection to XTAL2 pin.
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32KHz clock monitor minimum valid 32KHz period in 48MHz units
This property is required. |
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32KHz clock monitor maximum valid 32KHz period in 48MHz units
This property is required. |
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Maximum duty cycle variation. Difference in units of 48HMz between
the measured 32KHz high and low pulse widths.
This property is required. |
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Minimum number of consecutive 32KHz pulses that pass all monitor tests
This property is required. |
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Delay in milliseconds after crystal is enabled and clock monitor is
started.
This property is required. Default value: |
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Timeout in milliseconds waiting for PLL to lock to new clock source.
This property is required. Default value: |
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Bypass clkmon check of crystal or XTAL2 single-ended clock.
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If the internal silicon 32KHz oscillator is not chosen as the source
for PLL and Periheral devices then disable the internal 32KHz
oscillator to save power.
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “microchip,xec-pcr” compatible.
Name |
Type |
Details |
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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register space
This property is required. See Important properties for more information. |
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name of each register space
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interrupts for device
See Important properties for more information. |
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Specifier cell names
clock cells: regidx, bitpos, domain