nxp,imx-cguana-core-pll

Description

Integer PLL in an NXP i.MX CGU analog block.

Output frequency is the reference multiplied by nxp,loop-div, optionally
halved by nxp,post-div-by-2. clock-frequency states the resulting output so
the devicetree is readable without doing the arithmetic; it is checked against
the multiplier at build time rather than trusted.

    core_pll: core-pll {
            compatible = "nxp,imx-cguana-core-pll";
            clocks = <&sxosc>;
            nxp,loop-div = <33>;
            clock-frequency = <792000000>;
            #clock-cells = <0>;
    };

Properties

Properties not inherited from the base binding file.

Name

Type

Details

nxp,loop-div

int

 
Feedback loop divider; the reference is multiplied by this.

This property is required.

nxp,post-div-by-2

boolean

 
Halve the PLL output after the loop divider.

nxp,vco-high-band

boolean

 
Select the high VCO band. The low band covers roughly 600-858 MHz; a
target above that needs this set.

clock-frequency

int

 
output clock frequency (Hz)

This property is required.

#clock-cells

int

 
Number of items to expect in a Clock specifier

This property is required.

Constant value: 0