renesas,rz-cgc-subclk

Vendor: Renesas Electronics Corporation

Description

Renesas RZ Clock Control Peripheral Sub-Clock

Properties

Properties not inherited from the base binding file.

Name

Type

Details

clock-frequency

int

Select clock frequency (Hz) when asynchronous serial clock is selected in SPI and SCI

Default value: 96000000

Legal values: 75000000, 96000000

xspi-clk-frequency

int

Select clock frequency (Hz) supplied to xSPI

Default value: 12500000

Legal values: 133333333, 100000000, 50000000, 25000000, 12500000, 75000000, 37500000

canfd-source

int

Select clock source supplied to CANFD
- 0: PCLKCAN 80MHz
- 1: PCLKCAN 40MHz
- 2: PCLKM 100MHz

Default value: 1

Legal values: 0, 1, 2

eth-phy-source

string

25 MHz reference clock to the external Ethernet PHY.
Clock source is selectable from main clock or frequency-dividing clock for PLL1.

Default value: main

Legal values: 'pll1', 'main'