infineon,hppass-csg-dac

Description

Infineon HPPASS CSG DAC.

Represents the 10-bit, 30 Msps DAC inside a single CSG slice.  This node
must be a child of an "infineon,hppass-csg" CSG MFD parent.

This DAC has no external output pin.  Its output is wired internally to
the paired comparator's negative input, and may optionally be
routed to the SAR ADC for observation through CSG_CTRL.VDAC_OUT_SEL.
The DAC therefore cannot be used in isolation: the paired comparator
child node (same slice index) must also be configured and enabled.

Resolution is fixed at 10 bits.  Only direct-write mode is supported
through the standard Zephyr DAC API.  Advanced modes (buffered, slope,
LUT) are not yet supported.

Properties

Top level properties

These property descriptions apply to “infineon,hppass-csg-dac” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

Name

Type

Details

deglitch

int

DAC output deglitch length in HPPASS clock cycles
(DAC_CFG.DAC_DEGLITCH, 0-7).  Glitches shorter than this width are
filtered out on the DAC analog output before it is driven into the
paired comparator's negative input.

Default value: 0

Value range: 0 to 7

initial-value

int

Optional 10-bit value (0..1023) to write into SLICE[s].DAC_VAL at
driver init, before the HPPASS AC enters its locked state.  When
omitted, DAC_VAL is left at its hardware reset value of 0
(~0 V output).  Useful when the paired comparator must see a
stable mid-rail or other reference before the application has a
chance to call dac_write_value().

Value range: 0 to 1023

#io-channel-cells

int

This property is required.

Constant value: 1

Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “infineon,hppass-csg-dac” compatible.

Name	Type	Details
`reg`	`array`	Register region covering this slice's DAC_CFG, DAC_VAL_A, DAC_VAL_B and DAC_VAL within the CSG block. Slice index is derived at compile time from the offset divided by the CSG slice stride. This property is required. See Important properties for more information.
`interrupts`	`array`	DAC interrupt line for this slice. DAC interrupt only occurs in advanced modes: HW start trigger, SLOPE/LUT done, or BUFFERED/HYSTERETIC buffer empty. See Important properties for more information.
`status`	`string`	Indicates the operational status of the hardware or other resource that the node represents. In particular: - "okay" means the resource is operational and, for example, can be used by device drivers - "disabled" means the resource is not operational and the system should treat it as if it is not present For details, see "2.3.4 status" in Devicetree Specification v0.4. Legal values: `okay`, `disabled`, `reserved`, `fail`, `fail-sss` See Important properties for more information.
`compatible`	`string-array`	This property is a list of strings that essentially define what type of hardware or other resource this devicetree node represents. Each device driver checks for specific compatible property values to find the devicetree nodes that represent resources that the driver should manage. The recommended format is "vendor,device", The "vendor" part is an abbreviated name of the vendor. The "device" is usually from the datasheet. The compatible property can have multiple values, ordered from most- to least-specific. Having additional values is useful when the device is a specific instance of a more general family, to allow the system to match the most specific driver available. For details, see "2.3.1 compatible" in Devicetree Specification v0.4. This property is required. See Important properties for more information.
`reg-names`	`string-array`	Optional names given to each register block in the "reg" property. For example: / { soc { #address-cells = <1>; #size-cells = <1>; uart@1000 { reg = <0x1000 0x2000>, <0x3000 0x4000>; reg-names = "foo", "bar"; }; }; }; The uart@1000 node has two register blocks: - one with base address 0x1000, size 0x2000, and name "foo" - another with base address 0x3000, size 0x4000, and name "bar"
`ranges`	`compound`	Information used to define a mapping (or translation) between the address space of a bus (the "child address space") and the address space of the bus node's parent (the "parent address space"). The "ranges" property is typically empty, or a sequence of triplets (child bus address, parent bus address, length). If the "ranges" property is empty, it specifies that the parent and child address spaces are identical and no address translation is required. If the "ranges" property is not present in a bus node, it is assumed that no mapping exists between children of the node and the parent address space. For details, see "2.3.8 ranges" in Devicetree Specification v0.4.
`interrupts-extended`	`compound`	Extended interrupt specifier for device, used as an alternative to the "interrupts" property. For details, see "2.4 Interrupts and Interrupt Mapping" in Devicetree Specification v0.4.
`interrupt-names`	`string-array`	Optional names given to each interrupt generated by a device. The interrupts themselves are defined in either "interrupts" or "interrupts-extended" properties. For details, see "2.4 Interrupts and Interrupt Mapping" in Devicetree Specification v0.4.
`interrupt-parent`	`phandle`	If present, this refers to the node which handles interrupts generated by this device. For details, see "2.4 Interrupts and Interrupt Mapping" in Devicetree Specification v0.4.
`label`	`string`	Human readable string describing the device. Use of this property is deprecated except as needed on a case-by-case basis. For details, see "4.1.2 Miscellaneous Properties" in Devicetree Specification v0.4. See Important properties for more information.
`clocks`	`phandle-array`	Information about the device's clock providers. In general, this property should follow conventions established in the dt-schema binding: https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
`clock-names`	`string-array`	Optional names given to each clock provider in the "clocks" property.
`#address-cells`	`int`	This property encodes the number of <u32> cells used by address fields in "reg" properties in this node's children. For details, see "2.3.5 #address-cells and #size-cells" in Devicetree Specification v0.4.
`#size-cells`	`int`	This property encodes the number of <u32> cells used by size fields in "reg" properties in this node's children. For details, see "2.3.5 #address-cells and #size-cells" in Devicetree Specification v0.4.
`dma-coherent`	`boolean`	Indicates that the device is capable of coherent DMA operations. For details, see "2.3.10 dma-coherent" in Devicetree Specification v0.4.
`dmas`	`phandle-array`	DMA channel specifiers relevant to the device.
`dma-names`	`string-array`	Optional names given to the DMA channel specifiers in the "dmas" property.
`dma-ranges`	`compound`	The dma-ranges provides a means of defining a mapping or translation between the physical address space of the bus and the physical address space of the parent of the bus. For details, see "2.3.9 dma-ranges" in Devicetree Specification v0.4.
`io-channels`	`phandle-array`	IO channel specifiers relevant to the device.
`io-channel-names`	`string-array`	Optional names given to the IO channel specifiers in the "io-channels" property.
`mboxes`	`phandle-array`	Mailbox / IPM channel specifiers relevant to the device.
`mbox-names`	`string-array`	Optional names given to the mbox specifiers in the "mboxes" property.
`power-domains`	`phandle-array`	Power domain specifiers relevant to the device.
`power-domain-names`	`string-array`	Optional names given to the power domain specifiers in the "power-domains" property.
`#power-domain-cells`	`int`	Number of cells in power-domains property
`hwlocks`	`phandle-array`	HW spinlock id relevant to the device.
`hwlock-names`	`string-array`	Optional names given to the hwlock specifiers in the "hwlocks" property.
`zephyr,deferred-init`	`boolean`	Do not initialize device automatically on boot. Device should be manually initialized using device_init().
`wakeup-source`	`boolean`	Property to identify that a device can be used as wake up source. When this property is provided a specific flag is set into the device that tells the system that the device is capable of wake up the system. Wake up capable devices are disabled (interruptions will not wake up the system) by default but they can be enabled at runtime if necessary.
`zephyr,pm-device-runtime-auto`	`boolean`	Automatically configure the device for runtime power management after the init function runs.
`zephyr,disabling-power-states`	`phandles`	List of power states that will disable this device power.

Child node properties

Name	Type	Details
`reg`	`array`	Channel identifier. This property is required. See Important properties for more information.
`zephyr,resolution`	`int`	DAC resolution to be used for the channel.
`zephyr,buffered`	`boolean`	Enable output buffer for the channel.
`zephyr,internal`	`boolean`	Enable internal output path for the channel.
`zephyr,vref-mv`	`int`	This property can be used to specify the voltage (in millivolts) of the reference selected for this channel, so that applications can get that value if needed for some calculations.

Specifier cell names

io-channel cells: output