microchip,dac-g1

Description

Microchip G1 DAC

Microchip G1 DAC peripherals.

Group G1 DAC includes the following hardware peripherals:
  - module name="DAC" id="U2502" version="1.0.0"

Properties

Top level properties

These property descriptions apply to “microchip,dac-g1” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

Name

Type

Details

#io-channel-cells

int

Number of cells needed to represent a channel.

This property is required.

Constant value: 1

refsel

string

Reference Voltage selection.

Must be one of:
- "vref_au" (0x0) - Unbuffered External Voltage Reference
- "vdd_ana" (0x1) - Voltage Supply
- "vref_ab" (0x2) - Buffered External Voltage Reference
- "int_ref" (0x3) - Internal Bandgap Reference

This property is required.

Legal values: 'vref_au', 'vdd_ana', 'vref_ab', 'int_ref'

max-channels

int

Maximum number of channels

Default value: 2

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.

Child node properties

Name

Type

Details

reg

int

DAC channel number.

Allowed channel numbers are 0 to (max-channels - 1).
For example, if max-channels = 2, the allowed channels are 0 and 1.

This property is required.

See Important properties for more information.

rate

int

Conversion Speed in KSPS(Kilo Samples per second)

This property is required.

Legal values: 100, 500, 1000

ext-filter

boolean

Enable External Filter

data-adj

string

Controls how the DAC value is aligned in the DATA register.

"right" selects right alignment and "left" selects left alignment,
as controlled by the LEFTADJ bit. The default is "right", which
matches the hardware reset value of LEFTADJ = 0.
Right alignment places the LSB of the 12-bit value at bit 0 of DATA.

Default value: right

Legal values: 'right', 'left'

dither-mode

boolean

Enable the Dithering Mode

sampling-ratio

int

Set the Oversampling Ratio

Setting oversampling disables the refresh rate.

Default value: 1

Legal values: 1, 2, 4, 8, 16, 32

refresh-period

int

Refresh Period in us ( 0 - Disabled )

Legal values: 0, 30, 60, 90, 120, 150, 180, 210, 240, 270, 300, 330, 360, 390, 420, 450