sinowealth,sh1107 (on spi bus)

Overview

Name:

sinowealth,sh1107

Vendor:

Sino Wealth Electronic Ltd

Used in:

List of boards using this compatible

Description

SH1107 128x128 dot-matrix display controller on SPI bus

The Sinowealth SH1107 is a monochrome OLED controller with a maximum 128x128 resolution.

Properties

Node specific propertiesDeprecated node specific propertiesBase properties

Properties not inherited from the base binding file.

Name	Type	Details
data-cmd-gpios	phandle-array	D/C# pin. This property is required.
segment-offset	int	8-bit column start address for Page Addressing Mode This property is required.
page-offset	int	Start address for Page Addressing Mode This property is required.
display-offset	int	mapping of the display start line to one of COM0 .. COM63 This property is required.
multiplex-ratio	int	Multiplex Ratio This property is required.
segment-remap	boolean	Last column address is mapped to first segment
com-invdir	boolean	Scan direction is from last COM output to first COM output
com-sequential	boolean	Sequential COM pin configuration
prechargep	int	Duration of the pre-charge periods. Typically 0x22 at reset. This property is required.
reset-gpios	phandle-array	RESET pin. The RESET pin of SSD1306 is active low. If connected directly the MCU pin should be configured as active low.
inversion-on	boolean	Turn on display color inverting
ready-time-ms	int	Time it takes for the device from power up to become responsive and accepting commands. Defaults to 10ms (found by trial and error) if not provided. Default value: 10
use-internal-iref	boolean	Use internal Iref, not common but sometime used to save component cost.
softreset-on	boolean	Send a reset command on startup, if no reset GPIO pin is connected.
oscillator-freq	int	Front clock divider (3:0) / oscillator frequency (7:4). It can be set to 0x0. The default is the SSD1306 reset value, which is compatible with most displays. However sinowealth and chipwealth compatibles prefer a 0x50 default. Default value: 0x80
height	int	Height of the panel driven by the controller, with the units in pixels. This property is required.
width	int	Width of the panel driven by the controller, with the units in pixels. This property is required.
spi-max-frequency	int	Maximum clock frequency of device's SPI interface in Hz This property is required.
duplex	int	Duplex mode, full or half. By default it's always full duplex thus 0 as this is, by far, the most common mode. Use the macros not the actual enum value, here is the concordance list (see dt-bindings/spi/spi.h) 0 SPI_FULL_DUPLEX 2048 SPI_HALF_DUPLEX Default value: 0 Legal values: 0, 2048
frame-format	int	Motorola or TI frame format. By default it's always Motorola's, thus 0 as this is, by far, the most common format. Use the macros not the actual enum value, here is the concordance list (see dt-bindings/spi/spi.h) 0 SPI_FRAME_FORMAT_MOTOROLA 32768 SPI_FRAME_FORMAT_TI Default value: 0 Legal values: 0, 32768
spi-cpol	boolean	SPI clock polarity which indicates the clock idle state. If it is used, the clock idle state is logic high; otherwise, low.
spi-cpha	boolean	SPI clock phase that indicates on which edge data is sampled. If it is used, data is sampled on the second edge; otherwise, on the first edge.
spi-lsb-first	boolean	The device requires least significant bit first data mode.
spi-hold-cs	boolean	In some cases, it is necessary for the master to manage SPI chip select under software control, so that multiple spi transactions can be performed without releasing it. A typical use case is variable length SPI packets where the first spi transaction reads the length and the second spi transaction reads length bytes.
spi-cs-high	boolean	The device requires the chip select to be active high.
spi-interframe-delay-ns	int	Delay in nanoseconds between SPI words. Default of 0 is special value which will assume to mean half of the SCK period. Default value: 0
spi-cs-setup-delay-ns	int	Delay in nanoseconds to be introduced by the controller after CS is asserted. Also known as enable lead time.
spi-cs-hold-delay-ns	int	Delay in nanoseconds to be introduced by the controller before the CS is de-asserted. Also known as enable lag time.
supply-gpios	phandle-array	GPIO specifier that controls power to the device. This property should be provided when the device has a dedicated switch that controls power to the device. The supply state is entirely the responsibility of the device driver. Contrast with vin-supply.
vin-supply	phandle	Reference to the regulator that controls power to the device. The referenced devicetree node must have a regulator compatible. This property should be provided when device power is supplied by a shared regulator. The supply state is dependent on the request status of all devices fed by the regulator. Contrast with supply-gpios. If both properties are provided then the regulator must be requested before the supply GPIOS is set to an active state, and the supply GPIOS must be set to an inactive state before releasing the regulator.