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ultrachip,uc8175 (on spi bus)

Vendor: UltraChip Inc.

Description

UltraChip UC8175 EPD controller

Properties

Top level properties

These property descriptions apply to “ultrachip,uc8175” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

Name

Type

Details

reset-gpios

phandle-array

RESET pin.
The RESET pin of UC81xx is active low. If connected directly the MCU pin should be configured as active low.

This property is required.

dc-gpios

phandle-array

DC pin.
The DC pin of UC81xx is active low (transmission command byte). If connected directly the MCU pin should be configured as active low.

This property is required.

busy-gpios

phandle-array

BUSY pin.
The BUSY pin of UC81xx is active low. If connected directly the MCU pin should be configured as active low.

This property is required.

softstart

uint8-array

Booster Soft Start (BTST) values

spi-max-frequency

int

Maximum clock frequency of device's SPI interface in Hz

This property is required.

duplex

int

Duplex mode, full or half. By default it's always full duplex thus 0
as this is, by far, the most common mode.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
  0    SPI_FULL_DUPLEX
  2048 SPI_HALF_DUPLEX

Legal values: 0, 2048

frame-format

int

Motorola or TI frame format. By default it's always Motorola's,
thus 0 as this is, by far, the most common format.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
  0     SPI_FRAME_FORMAT_MOTOROLA
  32768 SPI_FRAME_FORMAT_TI

Legal values: 0, 32768

spi-cpol

boolean

SPI clock polarity which indicates the clock idle state.
If it is used, the clock idle state is logic high; otherwise, low.

spi-cpha

boolean

SPI clock phase that indicates on which edge data is sampled.
If it is used, data is sampled on the second edge; otherwise, on the first edge.

spi-hold-cs

boolean

In some cases, it is necessary for the master to manage SPI chip select
under software control, so that multiple spi transactions can be performed
without releasing it. A typical use case is variable length SPI packets
where the first spi transaction reads the length and the second spi transaction
reads length bytes.

supply-gpios

phandle-array

GPIO specifier that controls power to the device.

This property should be provided when the device has a dedicated
switch that controls power to the device.  The supply state is
entirely the responsibility of the device driver.

Contrast with vin-supply.

vin-supply

phandle

Reference to the regulator that controls power to the device.
The referenced devicetree node must have a regulator compatible.

This property should be provided when device power is supplied
by a shared regulator.  The supply state is dependent on the
request status of all devices fed by the regulator.

Contrast with supply-gpios.  If both properties are provided
then the regulator must be requested before the supply GPIOS is
set to an active state, and the supply GPIOS must be set to an
inactive state before releasing the regulator.

height

int

Height of the panel driven by the controller, with the units in pixels.

This property is required.

width

int

Width of the panel driven by the controller, with the units in pixels.

This property is required.

Child node properties

Name

Type

Details

pwr

uint8-array

Power Setting (PWR) values

cdi

int

VCOM and data interval value. This value is optional but must
be provided to enable border refresh control.

tcon

int

TCON setting value

pll

int

PLL / frame rate control

vdcs

int

VCOM DC settings

lutc

uint8-array

VCOM LUT

lutww

uint8-array

White-to-white LUT

lutkw

uint8-array

Black-to-white LUT

lutwk

uint8-array

White-to-black LUT

lutkk

uint8-array

White-to-black LUT

lutbd

uint8-array

Border LUT