nuvoton,npcx-gdma
Vendor: Nuvoton Technology Corporation
Note
An implementation of a driver matching this compatible is available in drivers/dma/dma_npcx_gdma.c.
Description
These nodes are “dma” bus nodes.
Nuvoton, NPCX-GDMA node
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
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GDMA channel offset
This property is required. |
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This option enables the GDMA support for NPCKn.
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Number of items to expect in a DMA specifier.
A phandle to the GDMA controller plus the following two integer cells:
1. channel: the dma channel, each channel supports one GDMA request line.
0: channel 0
1: channel 1
2. config: A 32bit mask specifying the GDMA channel configuration
- bit 0-5: Reserved. (default: 0x0)
- bit 6-7: Direction (see dma.h)
- 0x0: MEM to MEM
- 0x1: MEM to PERIPH
- 0x2: PERIPH to MEM
- 0x3: reserved for PERIPH to PERIPH
- bit 8-9: Transfer Width Select. The address width must be aligned
with the selected data width.
- 0x0: Byte (8 bits)
- 0x1: Word (16 bits)
- 0x2: Double-Word (32 bits)
This value is required if bit 10 is set to 1.
- 0x3: Reserved
- bit 10: 16-byte transfer (address must be 16-byte aligned)
- 0x0: Disable 16-byte transfer
- 0x1: Enable 16-byte transfer
- bit 11: Destination address direction.
- 0x0: Destination address incremented successively. (default)
- 0x1: Destination address decremented successively.
- bit 12: Source address direction.
- 0x0: Source address incremented successively. (default)
- 0x1: Source address decremented successively.
- bit 13: Destination address fixed.
- 0x0: Change the Destination address during the GDMA
operation. (default)
- 0x1: Fixed address is used for each data transfer from
the destination.
- bit 14: Source address fixed.
- 0x0: Change the source address during the GDMA operation. (default)
- 0x1: Fixed address is used for each data transfer from
the source.
This property is required. |
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Bitmask of available DMA channels in ascending order that are
not reserved by firmware and are available to the
kernel. i.e. first channel corresponds to LSB.
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Number of DMA channels supported by the controller
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Number of DMA request signals supported by the controller.
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Memory address alignment requirement for DMA buffers used by the controller.
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Memory size alignment requirement for DMA buffers used by the controller.
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Minimal chunk of data possible to be copied by the controller.
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “nuvoton,npcx-gdma” compatible.
Name |
Type |
Details |
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Information used to address the device. The value is specific to
the device (i.e. is different depending on the compatible
property).
The "reg" property is typically a sequence of (address, length) pairs.
Each pair is called a "register block". Values are
conventionally written in hex.
For details, see "2.3.6 reg" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Indicates the operational status of the hardware or other
resource that the node represents. In particular:
- "okay" means the resource is operational and, for example,
can be used by device drivers
- "disabled" means the resource is not operational and the system
should treat it as if it is not present
For details, see "2.3.4 status" in Devicetree Specification v0.4.
Legal values: See Important properties for more information. |
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This property is a list of strings that essentially define what
type of hardware or other resource this devicetree node
represents. Each device driver checks for specific compatible
property values to find the devicetree nodes that represent
resources that the driver should manage.
The recommended format is "vendor,device", The "vendor" part is
an abbreviated name of the vendor. The "device" is usually from
the datasheet.
The compatible property can have multiple values, ordered from
most- to least-specific. Having additional values is useful when the
device is a specific instance of a more general family, to allow the
system to match the most specific driver available.
For details, see "2.3.1 compatible" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Optional names given to each register block in the "reg" property.
For example:
/ {
soc {
#address-cells = <1>;
#size-cells = <1>;
uart@1000 {
reg = <0x1000 0x2000>, <0x3000 0x4000>;
reg-names = "foo", "bar";
};
};
};
The uart@1000 node has two register blocks:
- one with base address 0x1000, size 0x2000, and name "foo"
- another with base address 0x3000, size 0x4000, and name "bar"
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Information about interrupts generated by the device, encoded as an array
of one or more interrupt specifiers. The format of the data in this property
varies by where the device appears in the interrupt tree. Devices with the same
"interrupt-parent" will use the same format in their interrupts properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
See Important properties for more information. |
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Extended interrupt specifier for device, used as an alternative to
the "interrupts" property.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Optional names given to each interrupt generated by a device.
The interrupts themselves are defined in either "interrupts" or
"interrupts-extended" properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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If present, this refers to the node which handles interrupts generated
by this device.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Human readable string describing the device. Use of this property is
deprecated except as needed on a case-by-case basis.
For details, see "4.1.2 Miscellaneous Properties" in Devicetree
Specification v0.4.
See Important properties for more information. |
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Information about the device's clock providers. In general, this property
should follow conventions established in the dt-schema binding:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
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Optional names given to each clock provider in the "clocks" property.
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This property encodes the number of <u32> cells used by address fields
in "reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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This property encodes the number of <u32> cells used by size fields in
"reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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DMA channel specifiers relevant to the device.
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Optional names given to the DMA channel specifiers in the "dmas" property.
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IO channel specifiers relevant to the device.
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Optional names given to the IO channel specifiers in the "io-channels" property.
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Mailbox / IPM channel specifiers relevant to the device.
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Optional names given to the mbox specifiers in the "mboxes" property.
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Power domain specifiers relevant to the device.
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Optional names given to the power domain specifiers in the "power-domains" property.
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Number of cells in power-domains property
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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Specifier cell names
dma cells: channel, config