silabs,gpdma

Vendor: Silicon Laboratories

Note

An implementation of a driver matching this compatible is available in drivers/dma/dma_silabs_siwx91x_gpdma.c.

Description

These nodes are “dma” bus nodes.

Silicon Labs SiWx91x General Purpose DMA (GPDMA) Controller

The SiWx91x GPDMA controller provides high-performance DMA transfers for
memory-to-memory, memory-to-peripheral, and peripheral-to-memory operations.
It supports up to 8 channels.

Usage in Device Tree Overlays:

To enable GPDMA for a peripheral (e.g., SPI), add the following to your overlay:

```dts
&spi0 {
    status = "okay";
    cs-gpios = <&gpiob 12 GPIO_ACTIVE_LOW>;
    pinctrl-0 = <&spi0_default>;
    pinctrl-names = "default";

    dmas = <&gpdma0 0 11>, <&gpdma0 1 10>;
    dma-names = "tx", "rx";

    slow@0 {
        compatible = "test-spi-loopback-slow";
        reg = <0>;
        spi-max-frequency = <500000>;
    };
    fast@1 {
        compatible = "test-spi-loopback-fast";
        reg = <1>;
        spi-max-frequency = <10000000>;
    };
};

&gpdma0 {
    status = "okay";
};
```

DMA Configuration:
- Channel 0: Used for TX (transmit) operations
- Channel 1: Used for RX (receive) operations
- Slot 11: Peripheral slot for SPI TX
- Slot 10: Peripheral slot for SPI RX

The GPDMA controller automatically handles descriptor management and
interrupt generation for transfer completion and error conditions.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

silabs,channel-reg-base

int

Base address for channel specific registers.

silabs,dma-channel-count

int

Base address for channel specific registers.

#dma-cells

int

Number of items to expect in a DMA specifier

This property is required.

Constant value: 2

dma-channel-mask

int

Bitmask of available DMA channels in ascending order that are
not reserved by firmware and are available to the
kernel. i.e. first channel corresponds to LSB.

dma-channels

int

Number of DMA channels supported by the controller

dma-requests

int

Number of DMA request signals supported by the controller.

dma-buf-addr-alignment

int

Memory address alignment requirement for DMA buffers used by the controller.

dma-buf-size-alignment

int

Memory size alignment requirement for DMA buffers used by the controller.

dma-copy-alignment

int

Minimal chunk of data possible to be copied by the controller.

Specifier cell names

  • dma cells: channel, slot