microchip,lan865x (on spi bus)

Vendor: Microchip Technology Inc.

Note

An implementation of a driver matching this compatible is available in drivers/ethernet/eth_lan865x.c.

Description

LAN865x standalone 10BASE-T1L Ethernet controller with SPI interface.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

supply-gpios

phandle-array

GPIO specifier that controls power to the device.

This property should be provided when the device has a dedicated
switch that controls power to the device.  The supply state is
entirely the responsibility of the device driver.

Contrast with vin-supply.

vin-supply

phandle

Reference to the regulator that controls power to the device.
The referenced devicetree node must have a regulator compatible.

This property should be provided when device power is supplied
by a shared regulator.  The supply state is dependent on the
request status of all devices fed by the regulator.

Contrast with supply-gpios.  If both properties are provided
then the regulator must be requested before the supply GPIOS is
set to an active state, and the supply GPIOS must be set to an
inactive state before releasing the regulator.

spi-max-frequency

int

Maximum clock frequency of device's SPI interface in Hz

This property is required.

duplex

int

Duplex mode, full or half. By default it's always full duplex thus 0
as this is, by far, the most common mode.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
  0    SPI_FULL_DUPLEX
  2048 SPI_HALF_DUPLEX

Legal values: 0, 2048

frame-format

int

Motorola or TI frame format. By default it's always Motorola's,
thus 0 as this is, by far, the most common format.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
  0     SPI_FRAME_FORMAT_MOTOROLA
  32768 SPI_FRAME_FORMAT_TI

Legal values: 0, 32768

spi-cpol

boolean

SPI clock polarity which indicates the clock idle state.
If it is used, the clock idle state is logic high; otherwise, low.

spi-cpha

boolean

SPI clock phase that indicates on which edge data is sampled.
If it is used, data is sampled on the second edge; otherwise, on the first edge.

spi-hold-cs

boolean

In some cases, it is necessary for the master to manage SPI chip select
under software control, so that multiple spi transactions can be performed
without releasing it. A typical use case is variable length SPI packets
where the first spi transaction reads the length and the second spi transaction
reads length bytes.

local-mac-address

uint8-array

Specifies the MAC address that was assigned to the network device

zephyr,random-mac-address

boolean

Use a random MAC address generated when the driver is initialized.
Note that using this choice and rebooting a board may leave stale
MAC address in peers' ARP caches and lead to issues and delays in
communication.  (Use "ip neigh flush all" on Linux peers to clear
ARP cache.)

It is driver specific how the OUI octets are handled.

If set we ignore any setting of the local-mac-address property.

phy-handle

phandle

Specifies a reference to a node representing a PHY device.

phy-connection-type

string

Specifies the interface connection type between ethernet MAC and PHY.

Legal values: 'mii', 'rmii', 'gmii', 'rgmii'

tx-cut-through-mode

boolean

Enable TX cut through mode

rx-cut-through-mode

boolean

Enable RX cut through mode

plca-enable

boolean

Enable or disable PLCA support

plca-node-id

int

Specify the PLCA node ID number

plca-node-count

int

Specify the PLCA node count

plca-burst-count

int

Specify the PLCA burst count

plca-burst-timer

int

Specify the PLCA burst timer value

plca-to-timer

int

Specify the PLCA to timer value

int-gpios

phandle-array

The interrupt pin of LAN865X is active low.
If connected directly the MCU pin should be configured
as active low.

This property is required.

rst-gpios

phandle-array

The reset pin of LAN865X.

This property is required.