infineon,flash-controller

Description

Infineon CAT1 flash controller

Properties

Properties not inherited from the base binding file.

Name

Type

Details

erase-value

int

Byte value a flash cell reads back after an erase. This is a fixed
characteristic of the flash IP (e.g. 0xff on PSoC4/PSoC6, 0x00 on the
MXS40FLASHC used by PSC3), not a software-configurable option.

Default value: 0xff

infineon,explicit-erase

boolean

The flash IP requires an explicit erase of a row before it can be
programmed (e.g. MXS40FLASHC on PSC3). When this property is absent the
program operation performs an implicit erase-on-write (e.g. PSoC4/PSoC6).

infineon,cache-invalidate

string

Cache/prefetch invalidation mechanism the CPU must run after a program or
erase so subsequent reads are coherent.
  - none:          no invalidation required.
  - flashc-buffer: clear the FLASHC cache/prefetch buffer via the PDL
                   (PSoC4).
  - icache0:       invalidate the CM33 instruction cache by writing
                   ICACHE0->CMD (PSC3).

Default value: flashc-buffer

Legal values: none, flashc-buffer, icache0