st,stm32-ospi-nor (on ospi bus)
Vendor: STMicroelectronics
Note
An implementation of a driver matching this compatible is available in drivers/flash/flash_stm32_ospi.c.
Description
STM32 OSPI Flash controller supporting the JEDEC CFI interface
Representation of a serial flash on a octospi bus:
mx25lm51245: ospi-nor-flash@70000000 {
compatible = "st,stm32-ospi-nor";
reg = <0x70000000 DT_SIZE_M(64)>; /* 512 Mbits */
data-mode = <OSPI_OPI_MODE>; /* access on 8 data lines */
data-rate = <OSPI_DTR_TRANSFER>; /* access in DTR */
ospi-max-frequency = <DT_FREQ_M(50)>;
status = "okay";
};
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
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JEDEC ID as manufacturer ID, memory type, memory density
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flash capacity in bits
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Contains the 32-bit words in little-endian byte order from the
JESD216 Serial Flash Discoverable Parameters Basic Flash
Parameters table. This provides flash-specific configuration
information in cases were runtime retrieval of SFDP data
is not desired.
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Quad Enable Requirements value from JESD216 BFP DW15.
Use NONE if the device detects 1-1-4 and 1-4-4 modes by the
instruction. Use S1B6 if QE is bit 6 of the first status register
byte, and can be configured by reading then writing one byte with
RDSR and WRSR. For other fields see the specification.
Legal values: |
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Enter 4-Byte Addressing value from JESD216 BFP DW16
This property is ignored if the device is configured to use SFDP data
from the sfdp-bfp property (CONFIG_SPI_NOR_SFDP_DEVICETREE) or to read
SFDP properties at runtime (CONFIG_SPI_NOR_SFDP_RUNTIME).
For CONFIG_SPI_NOR_SFDP_MINIMAL this is the 8-bit value from bits 31:24
of DW16 identifying ways a device can be placed into 4-byte addressing
mode. If provided as a non-zero value the driver assumes that 4-byte
addressing is require to access the full address range, and
automatically puts the device into 4-byte address mode when the device
is initialized.
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Number of bytes in a page from JESD216 BFP DW11
This property is only used in the CONFIG_SPI_NOR_SFDP_MINIMAL configuration.
It is ignored if the device is configured to use SFDP data
from the sfdp-bfp property (CONFIG_SPI_NOR_SFDP_DEVICETREE) or
if the SFDP parameters are read from the device at
runtime (CONFIG_SPI_NOR_SFDP_RUNTIME).
The default value is 256 bytes if the value is not specified.
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Maximum clock frequency of device's OSPI interface in Hz
This property is required. |
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RESETn pin
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The duration (in ms) for the flash memory reset pulse
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The width of (Octo)SPI bus to which flash memory is connected.
Possible values are :
- OSPI_SPI_MODE <1> = SPI mode on 1 data line
- OSPI_DUAL_MODE <2> = Dual mode on 2 data lines
- OSPI_QUAD_MODE <4> = Quad mode on 4 data lines
- OSPI_OPI_MODE <8> = Octo mode on 8 data lines
This property is required. Legal values: |
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The SPI data Rate is STR or DTR
Possible values are :
- OSPI_STR_TRANSFER <1> = Single Rate Transfer
- OSPI_DTR_TRANSFER <2> = Dual Rate Transfer (only with OSPI_OPI_MODE)
This property is required. Legal values: |
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The value encodes number of I/O lines used for the opcode,
address, and data.
There is no info about quad page program opcodes in the SFDP
tables, hence it has been assumed that NOR flash memory
supporting 1-4-4 mode also would support fast page programming.
Intended for modes other than OSPI_OPI_MODE.
If absent, then program page opcode is determined by the
`spi-bus-width`:
* OSPI_SPI_MODE -> PP 1-1-1 (0x02)
* OSPI_DUAL_MODE -> PP 1-1-2 (0xA2)
* OSPI_QUAD_MODE -> PP 1-4-4 (0x38)
Legal values: |
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Some NOR-Flash ICs use different opcodes when operating in
4 byte addressing mode.
When enabled, then 3 byte opcodes will be converted to
4 byte opcodes.
* PP 1-1-1 (0x02) -> PP 1-1-1 4B (0x12)
* PP 1-1-4 (0x32) -> PP 1-1-4 4B (0x34)
* PP 1-4-4 (0x38) -> PP 1-4-4 4B (0x3E)
* READ 1-1-1 (0x03) -> READ 1-1-1 4B (0x13)
* READ FAST 1-1-1 (0x0B) -> READ FAST 1-1-1 4B (0x0C)
* DREAD 1-1-2 (0x3B) -> DREAD 1-1-2 4B (0x3C)
* 2READ 1-2-2 (0xBB) -> 2READ 1-2-2 4B (0xBC)
* QREAD 1-1-4 (0x6B) -> QREAD 1-1-4 4B (0x6C)
* 4READ 1-4-4 (0xEB) -> 4READ 1-4-4 4B (0xEC)
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,stm32-ospi-nor” compatible.
Name |
Type |
Details |
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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Flash Memory base address and size in bytes
This property is required. See Important properties for more information. |
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name of each register space
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interrupts for device
See Important properties for more information. |
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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