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mikro-bus

Vendor: Generic or vendor-independent

Description

GPIO pins exposed on Mikro BUS headers.

The Mikro BUS layout provides two headers, aligned on the opposite
edges of the board.

Documentation:
https://www.mikroe.com/mikrobus
https://download.mikroe.com/documents/standards/mikrobus/mikrobus-standard-specification-v200.pdf

This binding provides a nexus mapping for 10 pins, left side pins are
numbered 0 - 5 (AN - MOSI), the right side pins are numbered 6 - 10
(PWM - SDA). The bottom 2 pins on each side are used for input voltage
and ground, they are not mapped in the nexus.

                       Analog - AN     PWM - PWM output
                        Reset - RST    INT - Hardware Interrupt
              SPI Chip Select - CS      RX - UART Receive
                    SPI Clock - SCK     TX - UART Transmit
SPI Master Input Slave Output - MISO   SCL - I2C Clock
SPI Master Output Slave Input - MOSI   SDA - I2C Data
               VCC-3.3V power - +3.3V  +5V - VCC-5V power
             Reference Ground - GND    GND - Reference Ground

Board's silkscreen may vary depending you board, but coherent with
the description above as it's according to the standard's specification.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

gpio-map

compound

This property is required.

gpio-map-mask

compound

gpio-map-pass-thru

compound

#gpio-cells

int

Number of items to expect in a GPIO specifier

This property is required.