silabs,i2c

Description

These nodes are “i2c” bus nodes.

Silicon Labs Series 2 I2C (Inter-Integrated Circuit)

I2C peripheral on Silicon Labs EFM32 and EFR32 Series 2.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

This property is required.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.

This property is required.

zephyr,concat-buf-size

int

Size of a concatenation buffer that the driver is to use for merging
multiple I2C messages in the same direction that have no RESTART or STOP
flag between them (see e.g. the i2c_burst_write() function) into one
transfer on the bus.

This property must be provided when interacting with devices that cannot
tolerate a repeated start and address appearing on the bus between message
fragments. For many devices a concatenation buffer is not necessary.

Default value: 16

clock-frequency

int

Initial clock frequency in Hz

sq-size

int

Size of the submission queue for blocking requests

Default value: 4

cq-size

int

Size of the completion queue for blocking requests

Default value: 4

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.