nuvoton,npcx-i3c

Vendor: Nuvoton Technology Corporation

Note

An implementation of a driver matching this compatible is available in drivers/i3c/i3c_npcx.c.

Description

These nodes are “[‘i3c’, ‘i2c’]” bus nodes.

Nuvoton I3C controller

Representation:

/* If CONFIG_I3C_NPCX is enabled, the suggested clock configuration is as follows: */
&pcc {
  clock-frequency = <DT_FREQ_M(90)>; /* OFMCLK runs at 90MHz */
  core-prescaler = <3>; /* CORE_CLK runs at 30MHz */
  apb1-prescaler = <6>; /* APB1_CLK runs at 15MHz */
  apb2-prescaler = <6>; /* APB2_CLK runs at 15MHz */
  apb3-prescaler = <6>; /* APB3_CLK runs at 15MHz */
  apb4-prescaler = <3>; /* APB4_CLK runs at 30MHz */
};

&rst {
  status = "okay";
};

&i3c0 {
  status = "okay";

  /* I3C clock frequency suggestion = <PP_SCL, OD_SCL> */
   * Full speed = <12500000, 4170000>
   * Normal speed = <7500000, 1500000>
   */
  i3c-scl-hz = <12500000>;
  i3c-od-scl-hz = <4170000>;

  bcr = <0x67>; /* Set for controller mode */
};

Properties

Properties not inherited from the base binding file.

Name

Type

Details

resets

phandle-array

 
Reset information

This property is required.

i3c-od-scl-hz

int

 
Open Drain Frequency for the I3C controller. When undefined, use
the controller default or as specified by the I3C specification.

instance-id

int

 
Instance ID of the device, used to specify port number.
Bit[7:4] module id.
Bit[3:0] port id.

This property is required.

secondary

boolean

 
Initialized as a secondary controller.

static-address

int

 
Target static address.

tgt-pid

array

 
Target 48-bit Provisioned ID.
array[0]: PID[47:33] MIPI manufacturer ID.
          PID[32] ID type selector (i'b1 ramdom value, 1'b0 vendor fixed).
array[1]: PID[31:0] Random value or vendor fixed value.

bcr

int

 
Bus Characteristics Register, used for bus enumeration with ENTDAA and
determine device role and capabilities of the device on the bus.

This property is required.

dcr

int

 
Device Characteristics Register, used for bus enumeration with ENTDAA.

maximum-write

int

 
Maximum number of bytes that I3C controller may write to I3C target per message.
Range: 8 to 4095.

Default value: 4095

maximum-read

int

 
Maximum number of bytes that I3C controller may read from to I3C target per message.
Range: 8 to 4095.

Default value: 4095

i3c-scl-hz

int

 
Frequency of the SCL signal used for I3C transfers. When undefined,
use the controller default or as specified by the I3C specification.

i2c-scl-hz

int

 
Frequency of the SCL signal used for I2C transfers. When undefined
and there are I2C devices attached to the bus, look at the Legacy
Virtual Register (LVR) of all connected I2C devices to determine
the maximum allowed frequency.

pinctrl-0

phandles

 
Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

 
Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

 
Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

 
Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

 
Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

 
Names for the provided states. The number of names needs to match the
number of states.

reset-names

string-array

 
Name of each reset