cdac,thejas32-intc

Description

C-DAC THEJAS32 interrupt controller.

This is a simple second-level interrupt aggregator that combines the SoC
peripheral interrupt sources into the RISC-V machine external interrupt
line. Unlike a RISC-V PLIC it has no per-source priority and no
claim/complete protocol: it exposes a single enable bitmask and a single
(enabled and pending) status bitmask. A source is cleared by servicing the
peripheral that raised it.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

#interrupt-cells

int

Number of items to expect in an interrupt specifier

This property is required.

Constant value: 2

interrupt-controller

boolean

Convey's this node is an interrupt controller

This property is required.

Specifier cell names

  • interrupt cells: irq, priority