riscv,aplic

Description

RISC-V Advanced Platform-Level Interrupt Controller (APLIC).

The APLIC routes wired interrupts in a RISC-V AIA system.  It can operate
in two delivery modes:

  - MSI mode: interrupts are converted to Message-Signaled Interrupts and
    forwarded to an IMSIC.  Indicated by the presence of 'msi-parent'.
  - Direct delivery mode: interrupts are delivered directly to harts via
    the external interrupt signal (not yet supported by Zephyr).

Properties

Properties not inherited from the base binding file.

Name

Type

Details

riscv,num-sources

int

Number of interrupt sources supported by the APLIC

This property is required.

riscv,max-priority

int

Maximum priority level supported by the APLIC implementation.
Present on some platforms (e.g., QEMU virt). Not used by Zephyr yet.

msi-parent

phandle

Phandle to the IMSIC controller used for MSI delivery.
When present the driver operates in MSI mode; when absent
direct delivery mode is assumed.

interrupt-controller

boolean

Convey's this node is an interrupt controller

This property is required.

#interrupt-cells

int

Number of items to expect in an interrupt specifier

This property is required.

Specifier cell names

  • interrupt cells: irq, priority, flags