nxp,semc-sdram
Description
NXP SEMC SDRAM device
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
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SEMC SDRAM chip-select number. The SEMC controller supports up to four
chip-selects, so several SDRAM nodes (one per enabled chip-select) can
be attached to the same controller.
This property is required. Legal values: |
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SEMC clock frequency in Hz used to derive SDRAM timing.
This property is required. |
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SDRAM data bus width in bits.
This property is required. Legal values: |
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SDRAM burst length.
This property is required. Legal values: |
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SDRAM column address bit width.
This property is required. Legal values: |
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CAS latency in clock cycles.
This property is required. Legal values: |
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Precharge to activate wait time in nanoseconds (tRP).
This property is required. Maximum value: |
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Activate to read/write wait time in nanoseconds (tRCD).
This property is required. Maximum value: |
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Refresh recovery time in nanoseconds (max of tRFC, tXSR).
This property is required. Maximum value: |
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Write recovery time in nanoseconds (tWR).
This property is required. Maximum value: |
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CKE off minimum time in nanoseconds.
This property is required. Maximum value: |
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Activate to precharge time in nanoseconds (tRAS).
This property is required. Maximum value: |
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Self refresh recovery time in nanoseconds (tXSR).
This property is required. Maximum value: |
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Refresh to refresh wait time in nanoseconds (tRFC).
This property is required. Maximum value: |
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Activate to activate wait time in nanoseconds (tRRD).
This property is required. Maximum value: |
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Refresh period in nanoseconds per row, e.g. 64 ms / 8192 rows for a
64 ms refresh period.
This property is required. |
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Prescaler timer period in nanoseconds. When 0, this value is derived
as 160 * (1000000000 / clk-frequency), matching the MCUX SDK example.
Default value: |
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Refresh urgent threshold. When 0, this value is set to the value of
refresh-period-ns-per-row.
Default value: |
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Refresh burst length.
Default value: |
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DQS delay chain value used to compensate timing when DQS is faster than
read data. Selects 1 to 32 delay cells, with 1 selecting the minimum
delay. Only used on SoCs with SEMC delay chain control.
Default value: Legal values: |
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Additional auto refresh cycles run after mode register programming.
Default value: |
Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “nxp,semc-sdram” compatible.
Name |
Type |
Details |
|---|---|---|
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SDRAM base address and size. The base address is programmed into the
SEMC base address register of the selected chip-select.
This property is required. See Important properties for more information. |
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Indicates the operational status of the hardware or other
resource that the node represents. In particular:
- "okay" means the resource is operational and, for example,
can be used by device drivers
- "disabled" means the resource is not operational and the system
should treat it as if it is not present
For details, see "2.3.4 status" in Devicetree Specification v0.4.
Legal values: See Important properties for more information. |
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This property is a list of strings that essentially define what
type of hardware or other resource this devicetree node
represents. Each device driver checks for specific compatible
property values to find the devicetree nodes that represent
resources that the driver should manage.
The recommended format is "vendor,device", The "vendor" part is
an abbreviated name of the vendor. The "device" is usually from
the datasheet.
The compatible property can have multiple values, ordered from
most- to least-specific. Having additional values is useful when the
device is a specific instance of a more general family, to allow the
system to match the most specific driver available.
For details, see "2.3.1 compatible" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Optional names given to each register block in the "reg" property.
For example:
/ {
soc {
#address-cells = <1>;
#size-cells = <1>;
uart@1000 {
reg = <0x1000 0x2000>, <0x3000 0x4000>;
reg-names = "foo", "bar";
};
};
};
The uart@1000 node has two register blocks:
- one with base address 0x1000, size 0x2000, and name "foo"
- another with base address 0x3000, size 0x4000, and name "bar"
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Information used to define a mapping (or translation) between the address
space of a bus (the "child address space") and the address space of the
bus node's parent (the "parent address space").
The "ranges" property is typically empty, or a sequence of triplets
(child bus address, parent bus address, length).
If the "ranges" property is empty, it specifies that the parent and child
address spaces are identical and no address translation is required.
If the "ranges" property is not present in a bus node, it is assumed that
no mapping exists between children of the node and the parent address space.
For details, see "2.3.8 ranges" in Devicetree Specification v0.4.
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Information about interrupts generated by the device, encoded as an array
of one or more interrupt specifiers. The format of the data in this property
varies by where the device appears in the interrupt tree. Devices with the same
"interrupt-parent" will use the same format in their interrupts properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
See Important properties for more information. |
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Extended interrupt specifier for device, used as an alternative to
the "interrupts" property.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Optional names given to each interrupt generated by a device.
The interrupts themselves are defined in either "interrupts" or
"interrupts-extended" properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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If present, this refers to the node which handles interrupts generated
by this device.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Human readable string describing the device. Use of this property is
deprecated except as needed on a case-by-case basis.
For details, see "4.1.2 Miscellaneous Properties" in Devicetree
Specification v0.4.
See Important properties for more information. |
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Information about the device's clock providers. In general, this property
should follow conventions established in the dt-schema binding:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
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Optional names given to each clock provider in the "clocks" property.
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This property encodes the number of <u32> cells used by address fields
in "reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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This property encodes the number of <u32> cells used by size fields in
"reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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Indicates that the device is capable of coherent DMA operations.
For details, see "2.3.10 dma-coherent" in Devicetree Specification v0.4.
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DMA channel specifiers relevant to the device.
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Optional names given to the DMA channel specifiers in the "dmas" property.
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The dma-ranges provides a means of defining a mapping or translation between the
physical address space of the bus and the physical address space of the parent of the bus.
For details, see "2.3.9 dma-ranges" in Devicetree Specification v0.4.
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IO channel specifiers relevant to the device.
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Optional names given to the IO channel specifiers in the "io-channels" property.
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Mailbox / IPM channel specifiers relevant to the device.
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Optional names given to the mbox specifiers in the "mboxes" property.
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Power domain specifiers relevant to the device.
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Optional names given to the power domain specifiers in the "power-domains" property.
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Number of cells in power-domains property
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HW spinlock id relevant to the device.
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Optional names given to the hwlock specifiers in the "hwlocks" property.
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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