nxp,lcdic

Vendor: NXP Semiconductors

Note

An implementation of a driver matching this compatible is available in drivers/mipi_dbi/mipi_dbi_nxp_lcdic.c.

Description

These nodes are “mipi-dbi” bus nodes.

NXP LCDIC Controller. This controller implements 8080 and SPI mode MIPI-DBI
compliant transfers.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

nxp,swap-bytes

boolean

 
Swap bytes while transferring on LCDIC. When set, the LCDIC will send
the most significant byte first when using multibyte pixel formats.

reset-gpios

phandle-array

 
Reset GPIO pin. The controller will set this pin to logic high to reset
the display. If not provided, the LCDIC module's reset pin will be used
to reset attached displays.

nxp,write-inactive-cycles

int

 
Set minimum count of write inactive cycles, as a multiple of the module
clock frequency. This controls the length of the inactive period of the
WRX signal. Default is IP reset value. Only valid in 8080 mode.

Default value: 6

nxp,write-active-cycles

int

 
Set minimum count of write active cycles, as a multiple of the module
clock frequency. This controls the length of the active period of the
WRX signal. Default is IP reset value. Only valid in 8080 mode.

Default value: 6

nxp,timer0-ratio

int

 
Ratio for timer0, used for setting timer0 period (which is used for reset
and TX/RX short command timeout). Formula is:
timer0_period = (2 ^ timer0_ratio) / lcdic_freq
Default is IP reset value

Default value: 8

nxp,timer1-ratio

int

 
Ratio for timer1, used for setting timer1 period (which is used for TE
wait time, timeout, and long command timeout). Formula is:
timer1_period = (2 ^ timer1_ratio) * timer0_period
Default is IP reset value

Default value: 9

clock-frequency

int

 
Clock frequency of the SCL signal of the MBI-DBI peripheral, in Hz

pinctrl-0

phandles

 
Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

 
Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

 
Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

 
Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

 
Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

 
Names for the provided states. The number of names needs to match the
number of states.