renesas,rz-mipi-dsi

Overview

Name:

renesas,rz-mipi-dsi

Vendor:

Renesas Electronics Corporation

Used in:

List of boards using this compatible

Driver:

drivers/mipi_dsi/dsi_renesas_rz.c

Description

These nodes are “mipi-dsi” bus nodes.

Renesas RZ MIPI DSI host

Properties

Top level properties

These property descriptions apply to “renesas,rz-mipi-dsi” nodes themselves. This page also describes child node properties in the following sections.

Node specific propertiesDeprecated node specific propertiesBase properties

Properties not inherited from the base binding file.

Name	Type	Details
ulps-wakeup-period	int	ULPS wakeup period.
video-mode-delay	int	Set the delay value inside DSI Host until the transfer begins.
timing	array	MIPI DSI timing parameter: <CLKSTPT CLKBFHT CLKKPT GOLPBKT>
phy-clock	int	MIPI PHY clock frequency. Should be set to ensure clock frequency is at least (pixel clock * bits per output pixel) / number of mipi data lanes

Child node properties

Name	Type	Details
t-init	int	Minimum duration of the TINIT state (Units: PCLKA cycles). This property is required.
t-clk-prep	int	Duration of the clock lane LP-00 state (immediately before entry to the HS-0 state). This property is required.
t-hs-prep	int	Duration of the data lane LP-00 state (immediately before entry to the HS-0 state. This property is required.
t-clk-zero	int	TCLKZERO setting. This property is required.
t-clk-pre	int	TCLKPRE setting. This property is required.
t-clk-post	int	TCLKPOST setting. This property is required.
t-clk-trail	int	TCLKTRAIL setting. This property is required.
t-hs-zero	int	THSZERO setting. This property is required.
t-hs-trail	int	THSTRAIL setting. This property is required.
t-hs-exit	int	THSEXIT setting. This property is required.
t-lp-exit	int	Low-power transition time to High-Speed mode. This property is required.