st,stm32u5-mipi-dsi

Description

These nodes are “mipi-dsi” bus nodes.

STM32U5 series MIPI DSI controller.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

phy-freq-range

int

 
D-PHY PLL input frequency range. This is used to select the appropriate
frequency range for the D-PHY PLL operation:
  0x0 : Frequency range 80~100 MHz
  0x1 : Frequency range 100~120 MHz
  0x2 : Frequency range 120~160 MHz
  0x3 : Frequency range 160~200 MHz
  0x4 : Frequency range 200~240 MHz
  0x5 : Frequency range 240~320 MHz
  0x6 : Frequency range 320~390 MHz
  0x7 : Frequency range 390~450 MHz
  0x8 : Frequency range 450~510 MHz

This property is required.

Value range: 0x0 to 0x8

phy-low-power-offset

int

 
D-PHY low power offset configuration specific to STM32U5 series.
  0x0 : PHY_LP_OFFSSET_0_CLKP        (0 CLKP)
  0x1 : PHY_LP_OFFSSET_1_CLKP        (+1 CLKP)
  0x2 : PHY_LP_OFFSSET_2_CLKP        (+2 CLKP)
  0x3 : PHY_LP_OFFSSET_3_CLKP        (+3 CLKP)
  0x4 : PHY_LP_OFFSSET_4_CLKP        (+4 CLKP)
  0x5 : PHY_LP_OFFSSET_5_CLKP        (+5 CLKP)
  0x6 : PHY_LP_OFFSSET_6_CLKP        (+6 CLKP)
  0x7 : PHY_LP_OFFSSET_7_CLKP        (+7 CLKP)
  0x8 : PHY_LP_OFFSSET_MINUS_1_CLKP  (-1 CLKP)
  0x9 : PHY_LP_OFFSSET_MINUS_2_CLKP  (-2 CLKP)
  0xA : PHY_LP_OFFSSET_MINUS_3_CLKP  (-3 CLKP)
  0xB : PHY_LP_OFFSSET_MINUS_4_CLKP  (-4 CLKP)
  0xC : PHY_LP_OFFSSET_MINUS_5_CLKP  (-5 CLKP)
  0xD : PHY_LP_OFFSSET_MINUS_6_CLKP  (-6 CLKP)
  0xE : PHY_LP_OFFSSET_MINUS_7_CLKP  (-7 CLKP)
  0xF : PHY_LP_OFFSSET_MINUS_8_CLKP  (-8 CLKP)

This property is required.

Value range: 0x0 to 0xf

pll-vco-range

int

 
PLL VCO frequency range configuration for STM32U5 D-PHY:
  0x0 : Frequency range 500~800 MHz
  0x1 : Frequency range 800~1000 MHz

This property is required.

Value range: 0x0 to 0x1

pll-charge-pump

int

 
PLL charge pump configuration for STM32U5 D-PHY.
The correct value depends on the PLL charge pump frequency:
  0x0 : Frequency in range 2.0~4.4 MHz or 14.1~30.9 MHz
  0x1 : Frequency in range 4.4~14.1 MHz
  0x2 : Frequency in range 45.7~50 MHz
  0x3 : Frequency in range 30.9~45.7 MHz

This property is required.

Value range: 0x0 to 0x3

pll-tuning

int

 
PLL tuning parameter (loop filter) for STM32U5 D-PHY.
  0x0 : Frequency range 2000~4400 Hz
  0x1 : Frequency range 4400~30900 Hz
  0x2 : Frequency range 30900~50000 Hz

This property is required.

Value range: 0x0 to 0x2

resets

phandle-array

 
Reset information

This property is required.

hs-active-high

boolean

 
DSI host horizontal synchronization is active high.

vs-active-high

boolean

 
DSI host vertical synchronization is active high.

de-active-high

boolean

 
DSI host data enable is active high.

loosely-packed

boolean

 
Enable or disable loosely packed stream
(needed only when using 18-bit configuration).

largest-packet-size

int

 
The size, in bytes, of the low power largest packet that
can fit in a line during VSA, VBP, VFP and VACT regions

bta-ack-disable

boolean

 
Disable frame bus-turn-around acknowledge enable

non-continuous

boolean

 
DSI host enable non continuous clock.

pll-ndiv

int

 
DSI host dedicated PLL loop division factor.

This property is required.

pll-idf

int

 
DSI host dedicated PLL input division factor.

This property is required.

pll-odf

int

 
DSI HOST dedicated PLL output division factor.

This property is required.

active-errors

int

 
Indicates which error interrupts will be enabled.
This parameter can be any combination of DSI_Error_Data_Type and
defaults to HAL_DSI_ERROR_NONE.

lp-rx-filter

int

 
Use Low-Power Reception Filter. Cutoff frequency of low-pass filter at the input of LPRX.
Defaults to 0 which disables the filter.

host-timeouts

array

 
DSI HOST timeout parameters.

phy-timings

array

 
DSI HOST PHY timing parameters.

test-pattern

int

 
Show DSI host color bars, select color bar orientation
0 : Vertical color bars
1 : Horizontal color bars

Legal values: 0, 1

phy-clock

int

 
MIPI PHY clock frequency. Should be set to ensure clock frequency is at least (pixel clock * bits per output pixel) / number of mipi data lanes

reset-names

string-array

 
Name of each reset