st,stm32u5-mipi-dsi
Description
These nodes are “mipi-dsi” bus nodes.
STM32U5 series MIPI DSI controller.
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
|---|---|---|
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D-PHY PLL input frequency range. This is used to select the appropriate
frequency range for the D-PHY PLL operation.
0x0 : DSI_DPHY_FRANGE_80MHZ_100MHZ
0x1 : DSI_DPHY_FRANGE_100MHZ_120MHZ
0x2 : DSI_DPHY_FRANGE_120MHZ_160MHZ
0x3 : DSI_DPHY_FRANGE_160MHZ_200MHZ
0x4 : DSI_DPHY_FRANGE_200MHZ_240MHZ
0x5 : DSI_DPHY_FRANGE_240MHZ_320MHZ
0x6 : DSI_DPHY_FRANGE_320MHZ_390MHZ
0x7 : DSI_DPHY_FRANGE_390MHZ_450MHZ
0x8 : DSI_DPHY_FRANGE_450MHZ_510MHZ
This property is required. Legal values: |
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D-PHY low power offset configuration specific to STM32U5 series.
0x0 : PHY_LP_OFFSSET_0_CLKP (0 CLKP)
0x1 : PHY_LP_OFFSSET_1_CLKP (+1 CLKP)
0x2 : PHY_LP_OFFSSET_2_CLKP (+2 CLKP)
0x3 : PHY_LP_OFFSSET_3_CLKP (+3 CLKP)
0x4 : PHY_LP_OFFSSET_4_CLKP (+4 CLKP)
0x5 : PHY_LP_OFFSSET_5_CLKP (+5 CLKP)
0x6 : PHY_LP_OFFSSET_6_CLKP (+6 CLKP)
0x7 : PHY_LP_OFFSSET_7_CLKP (+7 CLKP)
0x8 : PHY_LP_OFFSSET_MINUS_1_CLKP (-1 CLKP)
0x9 : PHY_LP_OFFSSET_MINUS_2_CLKP (-2 CLKP)
0xA : PHY_LP_OFFSSET_MINUS_3_CLKP (-3 CLKP)
0xB : PHY_LP_OFFSSET_MINUS_4_CLKP (-4 CLKP)
0xC : PHY_LP_OFFSSET_MINUS_5_CLKP (-5 CLKP)
0xD : PHY_LP_OFFSSET_MINUS_6_CLKP (-6 CLKP)
0xE : PHY_LP_OFFSSET_MINUS_7_CLKP (-7 CLKP)
0xF : PHY_LP_OFFSSET_MINUS_8_CLKP (-8 CLKP)
This property is required. Legal values: |
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PLL VCO frequency range configuration for STM32U5 D-PHY.
0x0 : DSI_DPHY_VCO_FRANGE_500MHZ_800MHZ
0x1 : DSI_DPHY_VCO_FRANGE_800MHZ_1GHZ
This property is required. Legal values: |
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PLL charge pump configuration for STM32U5 D-PHY.
Valid values:
0x0 : DSI_PLL_CHARGE_PUMP_2000HZ_4400HZ
0x1 : DSI_PLL_CHARGE_PUMP_4400HZ_14100HZ
0x0 : DSI_PLL_CHARGE_PUMP_14100HZ_30900HZ
0x3 : DSI_PLL_CHARGE_PUMP_30900HZ_45700HZ
0x2 : DSI_PLL_CHARGE_PUMP_45700HZ_50000HZ
This property is required. Legal values: |
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PLL tuning parameter (loop filter) for STM32U5 D-PHY.
0x0 : DSI_PLL_LOOP_FILTER_2000HZ_4400HZ
0x1 : DSI_PLL_LOOP_FILTER_4400HZ_30900HZ
0x2 : DSI_PLL_LOOP_FILTER_30900HZ_50000HZ
This property is required. Legal values: |
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Reset information
This property is required. |
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DSI host horizontal synchronization is active high.
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DSI host vertical synchronization is active high.
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DSI host data enable is active high.
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Enable or disable loosely packed stream
(needed only when using 18-bit configuration).
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The size, in bytes, of the low power largest packet that
can fit in a line during VSA, VBP, VFP and VACT regions
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Disable frame bus-turn-around acknowledge enable
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DSI host enable non continuous clock.
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DSI host dedicated PLL loop division factor.
This property is required. |
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DSI host dedicated PLL input division factor.
This property is required. |
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DSI HOST dedicated PLL output division factor.
This property is required. |
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Indicates which error interrupts will be enabled.
This parameter can be any combination of DSI_Error_Data_Type and
defaults to HAL_DSI_ERROR_NONE.
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Use Low-Power Reception Filter. Cutoff frequency of low-pass filter at the input of LPRX.
Defaults to 0 which disables the filter.
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DSI HOST timeout parameters.
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DSI HOST PHY timing parameters.
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Show DSI host color bars, select color bar orientation
0 : Vertical color bars
1 : Horizontal color bars
Legal values: |
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MIPI PHY clock frequency. Should be set to ensure clock frequency is at least (pixel clock * bits per output pixel) / number of mipi data lanes
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Name of each reset
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,stm32u5-mipi-dsi” compatible.
Name |
Type |
Details |
|---|---|---|
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"dsiclk" DSI clock enable.
"dsisrc" DSI clock source.
"refclk" External crystal or oscillator clock.
"pixelclk" LTDC pixel clock.
"refclk" and "pixelclk" are only used to retrieve the frequency for timing calculation.
This property is required. |
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Information about the device's clock providers. In general, this property
should follow conventions established in the dt-schema binding:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
This property is required. |
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This property encodes the number of <u32> cells used by address fields
in "reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
This property is required. Constant value: |
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This property encodes the number of <u32> cells used by size fields in
"reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
This property is required. |
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Indicates the operational status of the hardware or other
resource that the node represents. In particular:
- "okay" means the resource is operational and, for example,
can be used by device drivers
- "disabled" means the resource is not operational and the system
should treat it as if it is not present
For details, see "2.3.4 status" in Devicetree Specification v0.4.
Legal values: See Important properties for more information. |
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This property is a list of strings that essentially define what
type of hardware or other resource this devicetree node
represents. Each device driver checks for specific compatible
property values to find the devicetree nodes that represent
resources that the driver should manage.
The recommended format is "vendor,device", The "vendor" part is
an abbreviated name of the vendor. The "device" is usually from
the datasheet.
The compatible property can have multiple values, ordered from
most- to least-specific. Having additional values is useful when the
device is a specific instance of a more general family, to allow the
system to match the most specific driver available.
For details, see "2.3.1 compatible" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Information used to address the device. The value is specific to
the device (i.e. is different depending on the compatible
property).
The "reg" property is typically a sequence of (address, length) pairs.
Each pair is called a "register block". Values are
conventionally written in hex.
For details, see "2.3.6 reg" in Devicetree Specification v0.4.
See Important properties for more information. |
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Optional names given to each register block in the "reg" property.
For example:
/ {
soc {
#address-cells = <1>;
#size-cells = <1>;
uart@1000 {
reg = <0x1000 0x2000>, <0x3000 0x4000>;
reg-names = "foo", "bar";
};
};
};
The uart@1000 node has two register blocks:
- one with base address 0x1000, size 0x2000, and name "foo"
- another with base address 0x3000, size 0x4000, and name "bar"
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Information about interrupts generated by the device, encoded as an array
of one or more interrupt specifiers. The format of the data in this property
varies by where the device appears in the interrupt tree. Devices with the same
"interrupt-parent" will use the same format in their interrupts properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
See Important properties for more information. |
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Extended interrupt specifier for device, used as an alternative to
the "interrupts" property.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Optional names given to each interrupt generated by a device.
The interrupts themselves are defined in either "interrupts" or
"interrupts-extended" properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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If present, this refers to the node which handles interrupts generated
by this device.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Human readable string describing the device. Use of this property is
deprecated except as needed on a case-by-case basis.
For details, see "4.1.2 Miscellaneous Properties" in Devicetree
Specification v0.4.
See Important properties for more information. |
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DMA channel specifiers relevant to the device.
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Optional names given to the DMA channel specifiers in the "dmas" property.
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IO channel specifiers relevant to the device.
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Optional names given to the IO channel specifiers in the "io-channels" property.
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Mailbox / IPM channel specifiers relevant to the device.
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Optional names given to the mbox specifiers in the "mboxes" property.
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Power domain specifiers relevant to the device.
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Optional names given to the power domain specifiers in the "power-domains" property.
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Number of cells in power-domains property
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HW spinlock id relevant to the device.
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Optional names given to the hwlock specifiers in the "hwlocks" property.
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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