bflb,sf-device

Description

Bouffalolab Serial Flash controller device

Bouffalolab Serial Flash controller device

Examples

// S3A1604 MRAM in QPI QIO
&sf_bank2 {
  reg = <0xa4000000 0x200000>;
  ranges = <0x0 0xa4000000 0x200000>;
  status = "okay";

  pinctrl-0 = <&sf3_default>;
  pinctrl-names = "default";

  s3a1604: mram@0 {
    compatible = "bflb,sf-device";
    reg = <0 0x200000>;

    spi-bus-mode = <4>;
    use-qpi;
    sf-pad = <3>;
    jedec-id = [d9 01 05];

    read-command = <0x0b>;
    read-dummy-cycles = <3>;
    write-command = <0xda>;
    write-dummy-cycles = <0>;
    enter-qpi-command = <0x38>;
    exit-qpi-command = <0xff>;

    initialization-sequence = <0x06 0x0 0x0 0x87 0x01250600 0x4>;
    quirk-bytes-read = [ a0 ];
    quirk-bytes-write = [ a0 ];
  };
};

// PM004MNI MRAM in QPI QIO
&sf_bank2 {
  reg = <0xa4000000 0x80000>;
  ranges = <0x0 0xa4000000 0x80000>;
  status = "okay";

  pinctrl-0 = <&sf2_default>;
  pinctrl-names = "default";

  pm004mni: mram@0 {
    compatible = "bflb,sf-device";
    reg = <0 0x80000>;

    spi-bus-mode = <4>;
    use-qpi;
    sf-pad = <2>;
    jedec-id = [29 55 00];

    read-command = <0xeb>;
    read-dummy-cycles = <0>;
    write-command = <0x38>;
    write-dummy-cycles = <0>;
    enter-qpi-command = <0x35>;
    exit-qpi-command = <0xf5>;
  };
};

Properties

Properties not inherited from the base binding file.

Name

Type

Details

sf-pad

int

Which pad is this device using. This is directly related to which pins are used.
Pad 1 is usually the embedded flash, Pad 2 and Pad 3 are usually external.
Main exception is BL70x/L where the default embedded pad is SF2.
External pads require a pinctrl entry at the bank.

This property is required.

Legal values: 1, 2, 3

spi-bus-mode

int

The width and mode of SPI bus to use for the device.
Numbers refer to the number of line used in each direction.

Possible values are:
 - IO <0> = 1-1-1 mode
 - DO <1> = 1-1-2 mode
 - QO <2> = 1-1-4 mode
 - DIO <3> = 1-2-2 mode
 - QIO <4> = 1-4-4 mode or 4-4-4 mode (QPI), or 0-4-4 mode (Continuous Read / XIP mode)

This property is required.

Legal values: 0, 1, 2, 3, 4

use-qpi

boolean

Enable QPI, only 4-4-4 is supported

sf-pad-is-external

boolean

Some pads can be both external and internal (like SF2 on BL70x/L).
Use external pad instead of the internal one.

read-command

int

SPI command to use for memory-mapped reading.

read-dummy-cycles

int

Dummy cycles for automatic read mode.
They are expressed in bytes of the address: 8 cycles with NIO, DO, QO, 4 with DIO, 2 with QIO.

continuous-read-command

int

Enable continuous read using this command setting.

write-command

int

SPI command to use for memory-mapped writing. Device must not require explicit or page sized
erase.

write-dummy-cycles

int

Dummy cycles for automatic write mode.
They are expressed in bytes of the address: 8 cycles with NIO, DO, QO, 4 with DIO, 2 with QIO.

initialization-sequence

array

Triples of command, data, datalength writes to set things up at setup time.
For example to clear out block protection, or setup dummy timing.
up to 4 bytes of data can be sent at once.
Remember the byte order is inverted (right to left).
Example of setting OC bits to 11 and disabling block protections on MX25L25645G:
initialization-sequence = <0x06 0x0 0x0 0x1 0xc002 0x2>;
If using this on internal flash this can be VERY dangerous, devcube / eflash loader is able
to recover register settings in case of needs.

enter-qpi-command

int

Command to enter QPI

exit-qpi-command

int

Command to exit QPI

jedec-id

uint8-array

JEDEC ID as manufacturer ID, memory type, memory density.

read-delay

int

Flash Read delay. The default is appropriate for standard flash speed.

Default value: 1

Legal values: 0, 1, 2, 3, 4

clock-invert

boolean

Invert Clock Signal.

rx-clock-invert

boolean

Invert RX Clock Signal.

quirk-bytes-write

uint8-array

Up to 4 bytes appended after the address for the auto-write command.

quirk-bytes-read

uint8-array

Up to 4 bytes appended after the address for the auto-read command.

tune-di

int

Fine tune pad delay for data in (0-3). Fine tuning is not usually necessary.

Default value: 0

tune-do

int

Fine tune pad delay for data out (0-3). Fine tuning is not usually necessary.

Default value: 0

tune-cs

int

Fine tune pad delay for CS (0-3). Fine tuning is not usually necessary.

Default value: 0

tune-clk

int

Fine tune pad delay for CLK (0-3). Fine tuning is not usually necessary.

Default value: 0

tune-oe

int

Fine tune pad delay for output enable (0-3). Fine tuning is not usually necessary.

Default value: 0

erase-block-size

int

address alignment required by flash erase operations

write-block-size

int

address alignment required by flash write operations