adi,adgm3121-gpio

Description

Analog Devices ADGM3121 DPDT MEMS switch (DC-24GHz), parallel GPIO control
mode, exposed as a MUX controller.

Each of the four MEMS switches (SW1..SW4) is controlled by a dedicated GPIO
pin (IN1..IN4). The four switches are modeled as a single control line whose
state is a 4-bit switch bitmask: bit i selects SW(i+1), 1 = closed.
mux_control_disconnect() opens all four switches (drives every line low).

Examples

#include <zephyr/dt-bindings/gpio/gpio.h>

adgm3121 {
        compatible = "adi,adgm3121-gpio";
        in1-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
        in2-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
        in3-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
        in4-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
        #mux-control-cells = <0>;
        #mux-state-cells = <1>;
};

Properties

Properties not inherited from the base binding file.

Name

Type

Details

in1-gpios

phandle-array

GPIO controlling switch SW1 (RF1A-RFCA).

This property is required.

in2-gpios

phandle-array

GPIO controlling switch SW2 (RF2A-RFCA).

This property is required.

in3-gpios

phandle-array

GPIO controlling switch SW3 (RF2B-RFCB).

This property is required.

in4-gpios

phandle-array

GPIO controlling switch SW4 (RF1B-RFCB).

This property is required.

#mux-control-cells

int

Number of cells in a "mux-controls" specifier. These cells form the
addressing portion only (which output line) and do NOT include the
target state value. Drivers receive the addressing cells in the
"cells" field of struct mux_control.

This property is required.

Constant value: 0

#mux-state-cells

int

Number of cells in a "mux-states" specifier. Equals
#mux-control-cells + 1: the trailing cell carries the default state
value. Backends may name the trailing cell whatever best describes
the hardware (e.g. "state" for a generic mux, "input" for an
XBAR, "source" for a TRGMUX).

This property is required.

Constant value: 1

Specifier cell names

  • mux-state cells: switches