nxp,otpc

Description

NXP OTPC eFuse controller

NXP OTPC On-Chip OTP (One-Time Programmable) eFuse controller.

Fuse values can be exposed through nvmem-layout child nodes. The OTP API is
byte addressed while the controller reads 32-bit words; the driver handles
unaligned nvmem-layout child 'reg' offsets and read offsets/lengths
internally, so 4-byte alignment is not required.

Examples

otpc: otpc@c9000 {
        compatible = "nxp,otpc";
        reg = <0xc9000 0x1000>;
        status = "okay";

        nvmem-layout {
                compatible = "fixed-layout";
                #address-cells = <1>;
                #size-cells = <1>;

                uuid: uuid@40 {
                        reg = <0x40 0x10>;
                        #nvmem-cell-cells = <0>;
                };
        };
};

Properties

Properties not inherited from the base binding file.

(None)