nuvoton,numicro-pinctrl

Vendor: Nuvoton Technology Corporation

Note

An implementation of a driver matching this compatible is available in drivers/pinctrl/pinctrl_numicro.c.

Description

Nuvoton NuMicro pinctrl node. This node will define pin configurations in pin groups,
and has the 'pinctrl' node identifier in the SOC's devicetree. Each group
within the pin configuration defines the pin configuration for a peripheral,
and each numbered subgroup in the pin group defines all the pins for that
peripheral with the same configuration properties. The 'pinmux' property in
a group selects the pins to be configured, and the remaining properties set
configuration values for those pins. Here is an example group for UART0 pins:

uart0_default: uart0_default {
  group0 {
    pinmux = <UART0_RXD_PB12>, <UART0_TXD_PB13>;
  };
};

Properties

Top level properties

These property descriptions apply to “nuvoton,numicro-pinctrl” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

(None)

Grandchild node properties

Name

Type

Details

bias-pull-up

boolean

enable pull-up resistor

bias-pull-down

boolean

enable pull-down resistor

drive-open-drain

boolean

drive with open drain (hardware AND)

input-disable

boolean

disable input on pin (e.g. disable an input buffer, no effect on output)

input-schmitt-enable

boolean

enable schmitt-trigger mode

pinmux

array

Pin mux selections for this group. See the SoC level pinctrl dtsi file
for a defined list of these options.

This property is required.

slew-rate

string

Pin output slew rate. Sets the HSRENx register. If not set, defaults to the
reset value (normal).

Default value: normal

Legal values: 'normal', 'high', 'fast'

input-debounce

boolean

enable the input debounce function