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nxp,imx93-pinctrl

Vendor: NXP Semiconductors

Description

The node has the 'pinctrl' node label set in MCUX SoC's devicetree. These
nodes can be autogenerated using the MCUXpresso config tools combined with
the imx_dts_gen.py script in NXP's HAL. The mux, mode, input, daisy, and cfg
fields in a group select the pins to be configured, and the remaining
devicetree properties set configuration values for those pins
for example, here is an group configuring LPUART1 pins:

group0 {
  pinmux = <&iomuxc_uart2_rxd_uart_rx_uart2_rx,
    &iomuxc_uart2_txd_uart_tx_uart2_tx>;
    bias-pull-up;
    slew-rate = "slow";
    drive-strength = "x1";
};

This will select UART2_RXD as UART2 rx, and UART2_TXD as UART2 tx.
Both pins will be configured with a slow slew rate, and x1 drive
strength.
Note that the soc level iomuxc dts file can be examined to find the possible
pinmux options. Here are the affects of each property on the
IOMUXC SW_PAD_CTL register:
input-schmitt-enable: HYS=1
drive-open-drain: OD=1
bias-pull-down: PD=0
bias-pull-up: PU
slew-rate: FSEL1=<enum_idx>
drive-strength: DSE=<enum_idx>
input-enable: SION=1 (in SW_MUX_CTL_PAD register)

If only required properties are supplied, the pin will have the following
configuration:
HYS=0,
PD=0
PU=0
OD=0,
FSEL1=<slew-rate>,
DSE=<drive-strength>,
SION=0,

Properties

Top level properties

These property descriptions apply to “nxp,imx93-pinctrl” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

(None)

Grandchild node properties

Name

Type

Details

pinmux

phandles

Pin mux selections for this group. See the soc level iomuxc DTSI file
for a defined list of these options.

This property is required.

drive-strength

string

Pin output drive strength. Sets the DSE field in the IOMUXC peripheral.
00_0000 X0, No driver
00_0001 X1
00_0011 X2
00_0111 X3
00_1111 X4
01_1111 X5
11_1111 X6

This property is required.

Legal values: 'x0', 'x1', 'x2', 'x3', 'x4', 'x5', 'x6'

slew-rate

string

Select slew rate for pin. Corresponds to SRE field in IOMUXC peripheral
0 SLOW — Slow Frequency Slew Rate
1 Slightly SLOW — Slightly Slow Frequency Slew Rate
2 Slightly FAST — Slightly Fast Frequency Slew Rate
3 FAST — Fast Frequency Slew Rate

This property is required.

Legal values: 'slow', 'slightly_slow', 'slightly_fast', 'fast'

bias-pull-up

boolean

enable pull-up resistor

bias-pull-down

boolean

enable pull-down resistor

drive-open-drain

boolean

drive with open drain (hardware AND)

input-enable

boolean

enable input on pin (no effect on output, such as enabling an input
buffer)

input-schmitt-enable

boolean

enable schmitt-trigger mode