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nxp,rt-iocon-pinctrl

Vendor: NXP Semiconductors

Description

RT600/RT500 pin control node. This node defines pin configurations in pin
groups, and has the 'pinctrl' node identifier in the SOC's devicetree. Each
group within the pin configuration defines a peripheral's pin configuration.
Each numbered subgroup represents pins with shared configuration for that
peripheral. The 'pinmux' property of each group selects the pins to be
configured with these properties. For example, here is a configuration
for FLEXCOMM0 pins:

pinmux_flexcomm0_usart: pinmux_flexcomm0_usart {
  group0 {
    pinmux = <FC0_TXD_SCL_MISO_WS_PIO0_1>,
            <FC0_RXD_SDA_MOSI_DATA_PIO0_2>;
    slew-rate = "normal";
    drive-strength = "normal";
  };
};

If only the required properties are supplied, the ICON_PIO register will
be assigned the following values:
IOCON_FUNC=<pin mux selection>,
IOCON_PUPDENA = 0,
IOCON_PUPDSEL = 0,
IOCON_IBENA = 0,
IOCON_SLEWRATE = <slew-rate selection>,
IOCON_FULLDRIVE = <drive-strength selection>,
IOCON_AMENA = 0,
IOCON_ODENA = 0,
IOCON_IIENA = 0,

Note the inherited pinctrl properties defined below have the following effects:
drive-open-drain: IOCON_ODENA=1
bias-pull-up: IOCON_PUPDENA=1, IOCON_PUPSEL=1
bias-pull-down: IOCON_PUPDENA=1, IOCON_PUPSEL=0
input-enable: IOCON_IBENA=1

Properties

Top level properties

These property descriptions apply to “nxp,rt-iocon-pinctrl” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

(None)

Grandchild node properties

Name

Type

Details

pinmux

array

Pin mux selection for this group. See the SOC level pinctrl header
file in NXP's HAL for a defined list of these options.

This property is required.

slew-rate

string

Pin output slew rate. Sets the SLEWRATE field in the IOCON register.
0 SLEWRATE_0- normal mode, output slew rate is standard
1 SLEWRATE_1- slow mode, output slew rate is slower

This property is required.

Legal values: 'normal', 'slow'

drive-strength

string

Pin output drive strength. Sets the FULLDRIVE field in the
IOCON register.
0 FULLDRIVE_0- normal mode, output slew rate is standard
1 FULLDRIVE_1- slow mode, output slew rate is slower

This property is required.

Legal values: 'normal', 'high'

nxp,invert

boolean

Invert the pin input logic level

nxp,analog-mode

boolean

Set the pin to analog mode. Sets AMENA=1

bias-pull-up

boolean

enable pull-up resistor

bias-pull-down

boolean

enable pull-down resistor

drive-open-drain

boolean

drive with open drain (hardware AND)

input-enable

boolean

enable input on pin (no effect on output, such as enabling an input
buffer)