nxp,lpc-iocon-pinctrl
Vendor: NXP Semiconductors
Description
LPC pinctrl node. This node defines pin configurations in pin groups, and has
the 'pinctrl' node identifier in the SOC's devicetree. Each group within the
pin configuration defines a peripheral's pin configuration. Each numbered
subgroup represents pins with shared configuration for that peripheral. The
'pinmux' property of each group selects the pins to be configured with these
properties. For example, here is a configuration for FLEXCOMM0 pins:
pinmux_flexcomm0_usart: pinmux_flexcomm0_usart {
group0 {
pinmux = <FC0_TXD_SCL_MISO_WS_PIO0_30>,
<FC0_RXD_SDA_MOSI_DATA_PIO0_29>;
slew-rate = "standard";
};
};
If only the required properties are supplied, the ICON_PIO register will
be assigned the following values:
IOCON_FUNC=<pin mux selection>,
IOCON_MODE=0,
IOCON_SLEW=<slew-rate selection>,
IOCON_INVERT=0,
IOCON_DIGIMODE=1,
IOCON_OD=0,
Values for I2C type and analog type pins have the following defaults:
IOCON_ASW=0
IOCON_SSEL=0
IOCON_FILTEROFF=1
IOCON_ECS=0
IOCON_EGP=1
IOCON_I2CFILTER=1
Note the inherited pinctrl properties defined below have the following effects:
drive-open-drain: IOCON_OD=1
bias-pull-up: IOCON_MODE=2
bias-pull-down: IOCON_MODE=1
drive-push-pull: IOCON_MODE=3
Note: for the LPC11u6x, the following fields are also supported:
IOCON_HYS- set by input-schmitt-enable
IOCON_S_MODE- set by nxp,digital-filter
IOCON_CLKDIV- set by nxp,filter-clock-div
IOCON_FILTR- set by nxp,analog-filter
Properties
Top level properties
These property descriptions apply to “nxp,lpc-iocon-pinctrl” nodes themselves. This page also describes child node properties in the following sections.
Properties not inherited from the base binding file.
(None)
Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “nxp,lpc-iocon-pinctrl” compatible.
Name |
Type |
Details |
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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register space
See Important properties for more information. |
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name of each register space
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interrupts for device
See Important properties for more information. |
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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No description provided for this label
See Important properties for more information. |
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Power domain specifiers
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Provided names of power domain specifiers
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Number of cells in power-domains property
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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Grandchild node properties
Name |
Type |
Details |
|---|---|---|
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Pin mux selection for this group. See the SOC level pinctrl header
file in NXP's HAL for a defined list of these options.
This property is required. |
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Pin output slew rate. Sets the SLEW field in the IOCON register.
defaults to standard slew rate, due to this being the reset value of
the field.
0 SLEW_0- standard mode, output slew rate is slower
1 SLEW_1- fast mode, output slew rate is faster
Default value: Legal values: |
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Invert the pin input logic level
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Set the pin to analog mode. Sets DIGIMODE=0, and ASW=1. Only valid for
analog type pins. Selects ASW0 on LPC55s3x family
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Select the pin's alternate analog mode. Valid on LPC55s3x family SOCs
when DIGIMODE=0. Only valid for analog type pins. Sets ASW1.
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Pin output power source. Only valid for I2C mode pins running in I2C
mode.
Legal values: |
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Digital input filter. Noise pulses below 10ms are filtered out.
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I2C glitch filter speed. Only valid for I2C mode pins. Fast mode
typically only required for High speed I2C.
Legal values: |
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I2C speed. Only valid for I2C mode pins. Fast mode should be used for
fast mode plus I2C.
Legal values: |
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Enable I2C pullup resistor. If not present, pin is open drain in I2C
mode. Only valid for I2C mode pins in I2C mode
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Enable I2C mode for a pin. If not present, pin is in GPIO mode. Only
valid for I2C mode pins
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enable pull-up resistor
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enable pull-down resistor
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drive actively high and low
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drive with open drain (hardware AND)
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enable schmitt-trigger mode
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