nxp,emios-pwm

Description

NXP eMIOS PWM node. Each channel (UC) in eMIOS can be configured to use for
PWM and capture operation. There are several modes supported by this module,
some modes only support on channels that have internal counter, some modes
require to use a reference timebase from a counter bus.

OPWMB and OPWMCB modes use reference timebase. Please notice that the devicetree
node for counter bus should be enabled and configured for using, please see
'nxp,emios' bindings.

Examples

emios0_pwm: pwm {
  pwm0 {
    channel = <16>;
    mode = "OPWFMB";
    counter-bus-type = "BUS_INTERNAL";
    prescaler = <8>;
  };

  pwm1 {
    channel = <9>;
    mode = "OPWMB";
    counter-bus-type = "BUS_C";
    phase-shift = <100>;
  };

  pwm2 {
    channel = <2>;
    mode = "OPWMCB_LEAD_EDGE";
    counter-bus-type = "BUS_B";
    dead-time = <100>;
  };
};

Properties

Top level properties

These property descriptions apply to “nxp,emios-pwm” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

Name	Type	Details
`pinctrl-0`	`phandles`	Pin configuration/s for the first state. Content is specific to the selected pin controller driver implementation. This property is required.
`pinctrl-names`	`string-array`	Names for the provided states. The number of names needs to match the number of states. This property is required.
`#pwm-cells`	`int`	Number of items to expect in a pwm specifier This property is required. Constant value: `3`
`channels`	`int`	Number of PWM channels supported by the controller.
`pinctrl-1`	`phandles`	Pin configuration/s for the second state. See pinctrl-0.
`pinctrl-2`	`phandles`	Pin configuration/s for the third state. See pinctrl-0.
`pinctrl-3`	`phandles`	Pin configuration/s for the fourth state. See pinctrl-0.
`pinctrl-4`	`phandles`	Pin configuration/s for the fifth state. See pinctrl-0.

Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “nxp,emios-pwm” compatible.

Name	Type	Details
`status`	`string`	Indicates the operational status of the hardware or other resource that the node represents. In particular: - "okay" means the resource is operational and, for example, can be used by device drivers - "disabled" means the resource is not operational and the system should treat it as if it is not present For details, see "2.3.4 status" in Devicetree Specification v0.4. Legal values: `okay`, `disabled`, `reserved`, `fail`, `fail-sss` See Important properties for more information.
`compatible`	`string-array`	This property is a list of strings that essentially define what type of hardware or other resource this devicetree node represents. Each device driver checks for specific compatible property values to find the devicetree nodes that represent resources that the driver should manage. The recommended format is "vendor,device", The "vendor" part is an abbreviated name of the vendor. The "device" is usually from the datasheet. The compatible property can have multiple values, ordered from most- to least-specific. Having additional values is useful when the device is a specific instance of a more general family, to allow the system to match the most specific driver available. For details, see "2.3.1 compatible" in Devicetree Specification v0.4. This property is required. See Important properties for more information.
`reg`	`array`	Information used to address the device. The value is specific to the device (i.e. is different depending on the compatible property). The "reg" property is typically a sequence of (address, length) pairs. Each pair is called a "register block". Values are conventionally written in hex. For details, see "2.3.6 reg" in Devicetree Specification v0.4. See Important properties for more information.
`reg-names`	`string-array`	Optional names given to each register block in the "reg" property. For example: / { soc { #address-cells = <1>; #size-cells = <1>; uart@1000 { reg = <0x1000 0x2000>, <0x3000 0x4000>; reg-names = "foo", "bar"; }; }; }; The uart@1000 node has two register blocks: - one with base address 0x1000, size 0x2000, and name "foo" - another with base address 0x3000, size 0x4000, and name "bar"
`ranges`	`compound`	Information used to define a mapping (or translation) between the address space of a bus (the "child address space") and the address space of the bus node's parent (the "parent address space"). The "ranges" property is typically empty, or a sequence of triplets (child bus address, parent bus address, length). If the "ranges" property is empty, it specifies that the parent and child address spaces are identical and no address translation is required. If the "ranges" property is not present in a bus node, it is assumed that no mapping exists between children of the node and the parent address space. For details, see "2.3.8 ranges" in Devicetree Specification v0.4.
`interrupts`	`array`	Information about interrupts generated by the device, encoded as an array of one or more interrupt specifiers. The format of the data in this property varies by where the device appears in the interrupt tree. Devices with the same "interrupt-parent" will use the same format in their interrupts properties. For details, see "2.4 Interrupts and Interrupt Mapping" in Devicetree Specification v0.4. See Important properties for more information.
`interrupts-extended`	`compound`	Extended interrupt specifier for device, used as an alternative to the "interrupts" property. For details, see "2.4 Interrupts and Interrupt Mapping" in Devicetree Specification v0.4.
`interrupt-names`	`string-array`	Optional names given to each interrupt generated by a device. The interrupts themselves are defined in either "interrupts" or "interrupts-extended" properties. For details, see "2.4 Interrupts and Interrupt Mapping" in Devicetree Specification v0.4.
`interrupt-parent`	`phandle`	If present, this refers to the node which handles interrupts generated by this device. For details, see "2.4 Interrupts and Interrupt Mapping" in Devicetree Specification v0.4.
`label`	`string`	Human readable string describing the device. Use of this property is deprecated except as needed on a case-by-case basis. For details, see "4.1.2 Miscellaneous Properties" in Devicetree Specification v0.4. See Important properties for more information.
`clocks`	`phandle-array`	Information about the device's clock providers. In general, this property should follow conventions established in the dt-schema binding: https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
`clock-names`	`string-array`	Optional names given to each clock provider in the "clocks" property.
`#address-cells`	`int`	This property encodes the number of <u32> cells used by address fields in "reg" properties in this node's children. For details, see "2.3.5 #address-cells and #size-cells" in Devicetree Specification v0.4.
`#size-cells`	`int`	This property encodes the number of <u32> cells used by size fields in "reg" properties in this node's children. For details, see "2.3.5 #address-cells and #size-cells" in Devicetree Specification v0.4.
`dma-coherent`	`boolean`	Indicates that the device is capable of coherent DMA operations. For details, see "2.3.10 dma-coherent" in Devicetree Specification v0.4.
`dmas`	`phandle-array`	DMA channel specifiers relevant to the device.
`dma-names`	`string-array`	Optional names given to the DMA channel specifiers in the "dmas" property.
`dma-ranges`	`compound`	The dma-ranges provides a means of defining a mapping or translation between the physical address space of the bus and the physical address space of the parent of the bus. For details, see "2.3.9 dma-ranges" in Devicetree Specification v0.4.
`io-channels`	`phandle-array`	IO channel specifiers relevant to the device.
`io-channel-names`	`string-array`	Optional names given to the IO channel specifiers in the "io-channels" property.
`mboxes`	`phandle-array`	Mailbox / IPM channel specifiers relevant to the device.
`mbox-names`	`string-array`	Optional names given to the mbox specifiers in the "mboxes" property.
`power-domains`	`phandle-array`	Power domain specifiers relevant to the device.
`power-domain-names`	`string-array`	Optional names given to the power domain specifiers in the "power-domains" property.
`#power-domain-cells`	`int`	Number of cells in power-domains property
`hwlocks`	`phandle-array`	HW spinlock id relevant to the device.
`hwlock-names`	`string-array`	Optional names given to the hwlock specifiers in the "hwlocks" property.
`zephyr,deferred-init`	`boolean`	Do not initialize device automatically on boot. Device should be manually initialized using device_init().
`wakeup-source`	`boolean`	Property to identify that a device can be used as wake up source. When this property is provided a specific flag is set into the device that tells the system that the device is capable of wake up the system. Wake up capable devices are disabled (interruptions will not wake up the system) by default but they can be enabled at runtime if necessary.
`zephyr,pm-device-runtime-auto`	`boolean`	Automatically configure the device for runtime power management after the init function runs.
`zephyr,disabling-power-states`	`phandles`	List of power states that will disable this device power.

Child node properties

Name	Type	Details
`channel`	`int`	eMIOS PWM channel This property is required.
`mode`	`string`	Select PWM mode: - OPWFMB: Provides waveforms with variable duty cycle and frequency. This mode uses internal counter. - OPWMB: Generate pulses with programmable leading and trailing edge placement. The period is determined by period of an external counter driven in MCB Up Mode. Changing PWM period at runtime will impact to all channels share the same timebase. The new period and cycle take effect in next period boundary. - OPWMCB: Generates a center aligned PWM with dead time insertion to the leading or trailing edge. The period is determined by period of an external counter driven in MCB Up Down Mode. Changing PWM period at runtime will impact to all channels share the same timebase, The new period and cycle take effect in next period boundary. - SAIC: Single action input capture mode, the eMIOS captures events as soon as they occur. The value of latest captured event is stored and can be read by software. This mode uses internal counter with range [0, 0xFFFF]. This property is required. Legal values: `OPWFMB`, `OPWMB`, `OPWMCB_TRAIL_EDGE`, `OPWMCB_LEAD_EDGE`, `SAIC`
`counter-bus-type`	`string`	Counter bus provides the time base for each channel (UC). Global counter bus provides the time base for any other channels. Local counter bus provides the time base for specific channels. Channel drives counter bus only use the internal counter as its time base. - BUS_A: global bus, driven by channel 23, used by other all channels - BUS_B: local bus, driven by channel 0, used by channels 1-7 - BUS_C: local bus, driven by channel 8, used by channels 9-15 - BUS_D: local bus, driven by channel 16, used by channels 17-23 - BUS_F: global bus, driven by channel 22, used by other all channels - BUS_INTERNAL: the channel's own internal counter, OPWFMB and SAIC mode use this type This property is required. Legal values: `BUS_A`, `BUS_B`, `BUS_C`, `BUS_D`, `BUS_F`, `BUS_INTERNAL`
`prescaler`	`int`	The clock divider for internal counter prescaler. Default value: `1` Value range: `1` to `16`
`dead-time`	`int`	Dead time (in ticks) for PWM channel in OPWMCB mode. Default value: `0`
`phase-shift`	`int`	Phase Shift (in ticks) for PWM channel in OPWMB mode. Default value: `0`
`input-filter`	`int`	Select the minimum input pulse width, in filter clock cycles that can pass through the input filter. The filter latency - the difference in time between the input and the response is three clock edges. Default 0 means the filter is bypassed. The clock source for programmable input filter is eMIOS clock. Default value: `0` Legal values: `0`, `2`, `4`, `8`, `16`

Specifier cell names

pwm cells: channel, period, flags