ti,am654-sdhci

Description

These nodes are “sd” bus nodes.

TI SD/eMMC Host Controller

Properties

Properties not inherited from the base binding file.

Name

Type

Details

ti,is-embedded

boolean

Whether the slot type is embedded or not

ti,dll-present

boolean

Whether PHY requires DLL configuration or not

ti,fails-without-test-cd

boolean

When present, indicates that the CD line is not connected and the controller must be put into Test mode to force the Card Detect signal high by setting the TESTCD bit.

ti,clkbuf-sel

int

Clock Delay Buffer Select

This property is required.

ti,strobe-sel

int

Strobe Select Delay

ti,strobe-sel-4-bit

boolean

Use 4-bit strobe selection mask instead of full 8-bit mask

ti,dll-frqsel-2-bit

boolean

Use 2-bit legacy frequency selection instead of 3-bit mode

ti,driver-strength-ohm

int

DLL drive strength in ohms

Legal values: 33, 40, 50, 66, 100

ti,trm-icp

int

DLL trim select

ti,itap-del-sel-legacy

int

Input tap delay for SD/MMC legacy timing

ti,otap-del-sel-legacy

int

Output tap delay for SD/MMC legacy timing

ti,itap-del-sel-hs

int

Input tap delay for SD/MMC High Speed timing

ti,otap-del-sel-hs

int

Output tap delay for SD/MMC High Speed timing

ti,itap-del-sel-sdr12

int

Input tap delay for SD UHS SDR12 timing

ti,otap-del-sel-sdr12

int

Output tap delay for SD UHS SDR12 timing

ti,itap-del-sel-sdr25

int

Input tap delay for SD UHS SDR25 timing

ti,otap-del-sel-sdr25

int

Output tap delay for SD UHS SDR25 timing

ti,otap-del-sel-sdr50

int

Output tap delay for SD UHS SDR50 timing

ti,itap-del-sel-ddr50

int

Input tap delay for SD UHS DDR50 timing

ti,otap-del-sel-ddr50

int

Output tap delay for SD UHS DDR50 timing

ti,itap-del-sel-ddr52

int

Input tap delay for eMMC DDR52 timing

ti,otap-del-sel-ddr52

int

Output tap delay for eMMC DDR52 timing

ti,otap-del-sel-sdr104

int

Output tap delay for SD UHS SDR104 timing

ti,otap-del-sel-hs200

int

Output tap delay for eMMC HS200 timing

vmmc-supply

phandle

Phandle to the regulator that provides the main power supply voltage
to the MMC/SD card.

vqmmc-supply

phandle

Phandle to the regulator that provides the I/O signaling voltage
(VDDIO) to the MMC/SD card.

max-current-330

int

Max drive current in mA at 3.3V. A value of zero indicates no maximum
is specified by the driver.

Default value: 0

max-current-300

int

Max drive current in mA at 3.0V. A value of zero indicates no maximum
is specified by the driver.

Default value: 0

max-current-180

int

Max drive current in mA at 1.8V. A value of zero indicates no maximum
is specified by the driver.

Default value: 0

max-bus-freq

int

Maximum bus frequency for SD card. This should be the highest frequency
the SDHC is capable of negotiating with cards on the bus.

Default value: 400000

min-bus-freq

int

Minimum bus frequency for SD card. This should be the frequency that
cards first will select when attached to the SDHC bus

Default value: 400000

power-delay-ms

int

time in ms for SDHC to delay when toggling power to the SD card. This
delay gives the card time to power up or down fully

Default value: 500

mmc-hs200-1_8v

boolean

The host controller supports HS200 at 1.8V

mmc-hs400-1_8v

boolean

The host controller supports HS400 at 1.8V

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.