st,iis3dwb (on spi bus)
Vendor: STMicroelectronics
Note
An implementation of a driver matching this compatible is available in drivers/sensor/st/iis3dwb/iis3dwb.c.
Description
STMicroelectronics IIS3DWB 3-axis accelerometer accessed through SPI bus
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
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INT1 pin
This pin defaults to active high when produced by the sensor.
The property value should ensure the flags properly describe
the signal that is presented to the driver.
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INT2 pin
This pin defaults to active high when produced by the sensor.
The property value should ensure the flags properly describe
the signal that is presented to the driver.
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Select DRDY pin number (1 or 2).
This number represents which of the two interrupt pins
(INT1 or INT2) the drdy line is attached to. This property is not
mandatory and if not present it defaults to 1 which is the
configuration at power-up.
- 1 # drdy is generated from INT1
- 2 # drdy is generated from INT2
Default value: Legal values: |
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Selects the pulsed mode for data-ready interrupt when enabled,
and the latched mode when disabled.
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Range in g. Default is power-up configuration.
- 0 # IIS3DWB_DT_FS_2G
- 1 # IIS3DWB_DT_FS_16G
- 2 # IIS3DWB_DT_FS_4G
- 3 # IIS3DWB_DT_FS_8G
Legal values: |
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Specify the default output data rate expressed in samples per second (Hz).
Default is power-down mode
- 0 # IIS3DWB_DT_ODR_OFF
- 5 # IIS3DWB_DT_ODR_26k7Hz
Legal values: |
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Specify the filter settings.
Default is power-down mode
- 0x00 # IIS3DWB_DT_LP_6k3Hz
- 0x10 # IIS3DWB_DT_SLOPE_ODR_DIV_4
- 0x11 # IIS3DWB_DT_HP_ODR_DIV_10
- 0x12 # IIS3DWB_DT_HP_ODR_DIV_20
- 0x13 # IIS3DWB_DT_HP_ODR_DIV_45
- 0x14 # IIS3DWB_DT_HP_ODR_DIV_100
- 0x15 # IIS3DWB_DT_HP_ODR_DIV_200
- 0x16 # IIS3DWB_DT_HP_ODR_DIV_400
- 0x17 # IIS3DWB_DT_HP_ODR_DIV_800
- 0x37 # IIS3DWB_DT_HP_REF_MODE
- 0x80 # IIS3DWB_DT_LP_ODR_DIV_4
- 0x81 # IIS3DWB_DT_LP_ODR_DIV_10
- 0x82 # IIS3DWB_DT_LP_ODR_DIV_20
- 0x83 # IIS3DWB_DT_LP_ODR_DIV_45
- 0x84 # IIS3DWB_DT_LP_ODR_DIV_100
- 0x85 # IIS3DWB_DT_LP_ODR_DIV_200
- 0x86 # IIS3DWB_DT_LP_ODR_DIV_400
- 0x87 # IIS3DWB_DT_LP_ODR_DIV_800
Legal values: |
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Specify the default FIFO watermark threshold. Every unit indicates a FIFO row (1 byte of TAG +
6 bytes of data). (min 0; max 255)
A typical threshold value is 32 which is then used as default.
Valid range: 0 - 511
Default value: |
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Specify the default accelerometer FIFO batch data rate expressed in Hz.
The values are taken in accordance to iis3dwb_bdr_xl_t enumerative in hal/st module.
Default is power-up configuration.
- 0 # IIS3DWB_DT_XL_NOT_BATCHED
- 10 # IIS3DWB_DT_XL_BATCHED_AT_26k7Hz
Legal values: |
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Specify the default timestamp FIFO batch data rate expressed in Hz.
The values are taken in accordance to iis3dwb_odr_t_batch_t enumerative in hal/st module.
Default is power-up configuration.
- 0 # IIS3DWB_DT_TEMP_NOT_BATCHED
- 3 # IIS3DWB_DT_TEMP_BATCHED_AT_104Hz
Legal values: |
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Specify the default timestamp FIFO batch data rate expressed as a fraction of the odr.
The values are taken in accordance to lis2dux12_dec_ts_t enumerative in hal/st module.
Default is power-up configuration.
- 0x0 # IIS3DWB_DT_TS_NOT_BATCHED
- 0x1 # IIS3DWB_DT_DEC_TS_1
- 0x2 # IIS3DWB_DT_DEC_TS_8
- 0x3 # IIS3DWB_DT_DEC_TS_32
Legal values: |
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Human readable string describing the sensor. It can be used to
distinguish multiple instances of the same model (e.g., lid accelerometer
vs. base accelerometer in a laptop) to a host operating system.
This property is defined in the Generic Sensor Property Usages of the HID
Usage Tables specification
(https://usb.org/sites/default/files/hut1_3_0.pdf, section 22.5).
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Maximum clock frequency of device's SPI interface in Hz
This property is required. |
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Duplex mode, full or half. By default it's always full duplex thus 0
as this is, by far, the most common mode.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
0 SPI_FULL_DUPLEX
2048 SPI_HALF_DUPLEX
Legal values: |
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Motorola or TI frame format. By default it's always Motorola's,
thus 0 as this is, by far, the most common format.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
0 SPI_FRAME_FORMAT_MOTOROLA
32768 SPI_FRAME_FORMAT_TI
Legal values: |
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SPI clock polarity which indicates the clock idle state.
If it is used, the clock idle state is logic high; otherwise, low.
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SPI clock phase that indicates on which edge data is sampled.
If it is used, data is sampled on the second edge; otherwise, on the first edge.
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The device requires least significant bit first data mode.
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In some cases, it is necessary for the master to manage SPI chip select
under software control, so that multiple spi transactions can be performed
without releasing it. A typical use case is variable length SPI packets
where the first spi transaction reads the length and the second spi transaction
reads length bytes.
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The device requires the chip select to be active high.
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Delay in nanoseconds between SPI words.
Default of 0 is special value which will assume to mean half of the SCK period.
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Delay in nanoseconds to be introduced by the controller after CS is asserted.
Also known as enable lead time.
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Delay in nanoseconds to be introduced by the controller before the CS is de-asserted.
Also known as enable lag time.
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GPIO specifier that controls power to the device.
This property should be provided when the device has a dedicated
switch that controls power to the device. The supply state is
entirely the responsibility of the device driver.
Contrast with vin-supply.
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Reference to the regulator that controls power to the device.
The referenced devicetree node must have a regulator compatible.
This property should be provided when device power is supplied
by a shared regulator. The supply state is dependent on the
request status of all devices fed by the regulator.
Contrast with supply-gpios. If both properties are provided
then the regulator must be requested before the supply GPIOS is
set to an active state, and the supply GPIOS must be set to an
inactive state before releasing the regulator.
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,iis3dwb” compatible.
Name |
Type |
Details |
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Indicates the operational status of the hardware or other
resource that the node represents. In particular:
- "okay" means the resource is operational and, for example,
can be used by device drivers
- "disabled" means the resource is not operational and the system
should treat it as if it is not present
For details, see "2.3.4 status" in Devicetree Specification v0.4.
Legal values: See Important properties for more information. |
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This property is a list of strings that essentially define what
type of hardware or other resource this devicetree node
represents. Each device driver checks for specific compatible
property values to find the devicetree nodes that represent
resources that the driver should manage.
The recommended format is "vendor,device", The "vendor" part is
an abbreviated name of the vendor. The "device" is usually from
the datasheet.
The compatible property can have multiple values, ordered from
most- to least-specific. Having additional values is useful when the
device is a specific instance of a more general family, to allow the
system to match the most specific driver available.
For details, see "2.3.1 compatible" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Information used to address the device. The value is specific to
the device (i.e. is different depending on the compatible
property).
The "reg" property is typically a sequence of (address, length) pairs.
Each pair is called a "register block". Values are
conventionally written in hex.
For details, see "2.3.6 reg" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Optional names given to each register block in the "reg" property.
For example:
/ {
soc {
#address-cells = <1>;
#size-cells = <1>;
uart@1000 {
reg = <0x1000 0x2000>, <0x3000 0x4000>;
reg-names = "foo", "bar";
};
};
};
The uart@1000 node has two register blocks:
- one with base address 0x1000, size 0x2000, and name "foo"
- another with base address 0x3000, size 0x4000, and name "bar"
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Information about interrupts generated by the device, encoded as an array
of one or more interrupt specifiers. The format of the data in this property
varies by where the device appears in the interrupt tree. Devices with the same
"interrupt-parent" will use the same format in their interrupts properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
See Important properties for more information. |
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Extended interrupt specifier for device, used as an alternative to
the "interrupts" property.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Optional names given to each interrupt generated by a device.
The interrupts themselves are defined in either "interrupts" or
"interrupts-extended" properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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If present, this refers to the node which handles interrupts generated
by this device.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Human readable string describing the device. Use of this property is
deprecated except as needed on a case-by-case basis.
For details, see "4.1.2 Miscellaneous Properties" in Devicetree
Specification v0.4.
See Important properties for more information. |
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Information about the device's clock providers. In general, this property
should follow conventions established in the dt-schema binding:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
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Optional names given to each clock provider in the "clocks" property.
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This property encodes the number of <u32> cells used by address fields
in "reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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This property encodes the number of <u32> cells used by size fields in
"reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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DMA channel specifiers relevant to the device.
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Optional names given to the DMA channel specifiers in the "dmas" property.
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IO channel specifiers relevant to the device.
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Optional names given to the IO channel specifiers in the "io-channels" property.
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Mailbox / IPM channel specifiers relevant to the device.
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Optional names given to the mbox specifiers in the "mboxes" property.
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Power domain specifiers relevant to the device.
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Optional names given to the power domain specifiers in the "power-domains" property.
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Number of cells in power-domains property
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HW spinlock id relevant to the device.
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Optional names given to the hwlock specifiers in the "hwlocks" property.
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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