atmel,sam0-uart
Vendor: Atmel Corporation
Note
An implementation of a driver matching this compatible is available in drivers/serial/uart_sam0.c.
Description
These nodes are “uart” bus nodes.
Atmel SAM0 SERCOM UART driver
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
|---|---|---|
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Receive Data Pinout. An enumeration with the following values:
+-------+---------------+
| Value | RX Pin |
+-------+---------------+
| 0 | SERCOM_PAD[0] |
+-------+---------------+
| 1 | SERCOM_PAD[1] |
+-------+---------------+
| 2 | SERCOM_PAD[2] |
+-------+---------------+
| 3 | SERCOM_PAD[3] |
+-------+---------------+
This property is required. |
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Transmit Data Pinout. An enumeration with values that depend on the
hardware being used. This controls both the transmit pins and if
hardware flow control is used.
SAMD20:
+-------+---------------+
| Value | TX Pin |
+-------+---------------+
| 0 | SERCOM_PAD[0] |
+-------+---------------+
| 1 | SERCOM_PAD[2] |
+-------+---------------+
SAMD21/DA21/R21:
+-------+---------------+---------------+---------------+
| Value | TX Pin | RTS | CTS |
+-------+---------------+---------------+---------------+
| 0 | SERCOM_PAD[0] | N/A | N/A |
+-------+---------------+---------------+---------------+
| 1 | SERCOM_PAD[2] | N/A | N/A |
+-------+---------------+---------------+---------------+
| 2 | SERCOM_PAD[0] | SERCOM_PAD[2] | SERCOM_PAD[3] |
+-------+---------------+---------------+---------------+
| 3 | Reserved |
+-------+-----------------------------------------------+
SAML2x/C2x:
+-------+----------------+---------------+--------------+
| Value | TX Pin | RTS | CTS |
+-------+---------------+---------------+---------------+
| 0 | SERCOM_PAD[0] | N/A | N/A |
+-------+---------------+---------------+---------------+
| 1 | SERCOM_PAD[2] | N/A | N/A |
+-------+---------------+---------------+---------------+
| 2 | SERCOM_PAD[0] | SERCOM_PAD[2] | SERCOM_PAD[3] |
+-------+---------------+---------------+---------------+
| 3 | SERCOM_PAD[0] | SERCOM_PAD[2] | N/A |
+-------+---------------+---------------+---------------+
SAMD5/E5:
+-------+---------------+---------------+---------------+
| Value | TX Pin | RTS | CTS |
+-------+---------------+---------------+---------------+
| 0 | SERCOM_PAD[0] | N/A | N/A |
+-------+---------------+---------------+---------------+
| 1 | Reserved |
+-------+---------------+---------------+---------------+
| 2 | SERCOM_PAD[0] | SERCOM_PAD[2] | SERCOM_PAD[3] |
+-------+---------------+---------------+---------------+
| 3 | SERCOM_PAD[0] | SERCOM_PAD[2] | N/A |
+-------+---------------+---------------+---------------+
This property is required. |
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Enable collision detection for half-duplex mode.
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Clock frequency information for UART operation
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Initial baud rate setting for UART
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Set to enable RTS/CTS flow control at boot time
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Configures the parity of the adapter. Enumeration id 0 for none, 1 for odd
and 2 for even parity. Default to none if not specified.
Legal values: |
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Sets the number of stop bits.
Legal values: |
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Sets the number of data bits.
Legal values: |
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Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.
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Pin configuration/s for the second state. See pinctrl-0.
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Pin configuration/s for the third state. See pinctrl-0.
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Pin configuration/s for the fourth state. See pinctrl-0.
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Pin configuration/s for the fifth state. See pinctrl-0.
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Names for the provided states. The number of names needs to match the
number of states.
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “atmel,sam0-uart” compatible.
Name |
Type |
Details |
|---|---|---|
|
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register space
This property is required. See Important properties for more information. |
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interrupts for device
This property is required. See Important properties for more information. |
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Clock gate information
This property is required. |
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name of each clock
This property is required. |
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Optional TX & RX dma specifiers. Each specifier will have a phandle
reference to the dmac controller, the channel number, and peripheral
trigger source.
For example dmas for TX, RX on SERCOM3
dmas = <&dmac 0 0xb>, <&dmac 0 0xa>;
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Required if the dmas property exists. This should be "tx" and "rx"
to match the dmas property.
For example
dma-names = "tx", "rx";
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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name of each register space
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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No description provided for this label
See Important properties for more information. |
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number of address cells in reg property
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number of size cells in reg property
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Power domain specifiers
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Provided names of power domain specifiers
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Number of cells in power-domains property
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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