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st,stm32-uart

Vendor: STMicroelectronics

Description

These nodes are “uart” bus nodes.

STM32 UART

Properties

Properties not inherited from the base binding file.

Name

Type

Details

single-wire

boolean

Enable the single wire half-duplex communication.
Using this mode, TX and RX lines are internally connected and
only TX pin is used afterwards and should be configured.
RX/TX conflicts must be handled on user side.

tx-rx-swap

boolean

Swap the TX and RX pins. Used in case of a cross wired connection.

tx-invert

boolean

Invert the binary logic of tx pin. When enabled, physical logic levels are inverted and
we use 1=Low, 0=High instead of 1=High, 0=Low.

rx-invert

boolean

Invert the binary logic of rx pin. When enabled, physical logic levels are inverted and
we use 1=Low, 0=High instead of 1=High, 0=Low.

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

This property is required.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.

This property is required.

wakeup-line

int

EXTI line number matching the device wakeup interrupt mask register.
This property is required on stm32 devices where the wakeup interrupt signal could be
configured masked at boot (sm32wl55 for instance), preventing the device to wakeup
the core from stop mode(s).
Valid range: 0 - 31

clock-frequency

int

Clock frequency information for UART operation

current-speed

int

Initial baud rate setting for UART

hw-flow-control

boolean

Set to enable RTS/CTS flow control at boot time

parity

string

Configures the parity of the adapter. Enumeration id 0 for none, 1 for odd
and 2 for even parity. Default to none if not specified.

Legal values: 'none', 'odd', 'even'

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.