st,stm32-timers
Description
STM32 timers
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
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Reset information
This property is required. |
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Clock prescaler at the input of the timer
Could be in range [0 .. 0xFFFF] for STM32 General Purpose Timers (CLK/(prescaler+1) )
This property is required. |
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Sets timer counter mode.
Use constants defined in dt-bindings/timer/stm32-timer.h.
* STM32_TIM_COUNTERMODE_UP - used as upcounter.
* STM32_TIM_COUNTERMODE_DOWN - used as downcounter.
* STM32_TIM_COUNTERMODE_CENTER_DOWN - counts up and down alternatively.
Output compare interrupt flags of output channels
are set only when the counter is counting down.
* STM32_TIM_COUNTERMODE_CENTER_UP - counts up and down alternatively.
Output compare interrupt flags of output channels
are set only when the counter is counting up.
* STM32_TIM_COUNTERMODE_CENTER_UP_DOWN - counts up and down alternatively.
Output compare interrupt flags of output channels
are set only when the counter is counting up or
down.
If absent, then STM32_TIM_COUNTERMODE_UP is used (reset state).
Default value: |
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Sets the dead-time configuration on the associated timer which will add
a delay between the rising edge of the reference signal and the rising
edge of both the OCx and OCxN signals. This is commonly used and required
with bridge circuits to prevent shoot-through currents.
This feature is supported only by certain timer instances. Refer
to your product's Reference Manual for more information about this
feature's availability. (In particular, certain series such as
STM32L0/STM32L1 have no instance supporting this feature).
Default value: Value range: |
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Selects master mode (trigger output TRGO source selection)
of the timer instance. Only available for timer instances
with master function - property is ignored otherwise.
For details, refer to your device's Reference Manual.
* RESET - The UG bit from the TIMx_EGR register is used
as TRGO.
* ENABLE - The Counter enable signal, CNT_EN, is used as TRGO.
* UPDATE - The update event is used as TRGO.
* CC1IF - The CC1IF set event is used as TRGO.
* OC1REF - OC1REF signal is used as TRGO.
* OC2REF - OC2REF signal is used as TRGO.
* OC3REF - OC3REF signal is used as TRGO.
* OC4REF - OC4REF signal is used as TRGO.
Default value: Legal values: |
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Selects the slave mode behavior of the timer instance.
Only available for timer instances with slave function - property is ignored otherwise.
Only compatible with CONFIG_PWM_CAPTURE in `four-channel-capture-support` mode.
For details, refer to your device's Reference Manual.
* disabled - Slave mode disabled
* reset - Rising edge of trigger input (TRGI see `st,trigger-selection`)
reinitializes the counter and generates an update of the registers.
* gated - The counter clock is enabled when TRGI is high. The counter stops
(but is not reset) as soon as the trigger becomes low. Both start
and stop of the counter are controlled.
* trigger - The counter starts at a rising edge of TRGI (but it is not reset).
Only the start of the counter is controlled.
* combined_resettrigger - Rising edge of (TRGI) reinitializes the counter, generates an
update of the registers and starts the counter.
Not available on all series.
* combined_gatedreset - The counter clock is enabled when TRGI is high. The counter stops
and is reset as soon as the trigger becomes low. Both start and
stop of the counter are controlled.
Not available on all series.
Default value: Legal values: |
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Selects the input trigger (TRGI) source for slave mode operation.
Only available for timer instances with slave function - property is ignored otherwise.
ITR4-15 options are not available on all series.
For details, refer to your device's Reference Manual.
Default value: Legal values: |
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Name of each reset
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,stm32-timers” compatible.
Name |
Type |
Details |
|---|---|---|
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Information used to address the device. The value is specific to
the device (i.e. is different depending on the compatible
property).
The "reg" property is typically a sequence of (address, length) pairs.
Each pair is called a "register block". Values are
conventionally written in hex.
For details, see "2.3.6 reg" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Information about the device's clock providers. In general, this property
should follow conventions established in the dt-schema binding:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
This property is required. |
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Indicates the operational status of the hardware or other
resource that the node represents. In particular:
- "okay" means the resource is operational and, for example,
can be used by device drivers
- "disabled" means the resource is not operational and the system
should treat it as if it is not present
For details, see "2.3.4 status" in Devicetree Specification v0.4.
Legal values: See Important properties for more information. |
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This property is a list of strings that essentially define what
type of hardware or other resource this devicetree node
represents. Each device driver checks for specific compatible
property values to find the devicetree nodes that represent
resources that the driver should manage.
The recommended format is "vendor,device", The "vendor" part is
an abbreviated name of the vendor. The "device" is usually from
the datasheet.
The compatible property can have multiple values, ordered from
most- to least-specific. Having additional values is useful when the
device is a specific instance of a more general family, to allow the
system to match the most specific driver available.
For details, see "2.3.1 compatible" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Optional names given to each register block in the "reg" property.
For example:
/ {
soc {
#address-cells = <1>;
#size-cells = <1>;
uart@1000 {
reg = <0x1000 0x2000>, <0x3000 0x4000>;
reg-names = "foo", "bar";
};
};
};
The uart@1000 node has two register blocks:
- one with base address 0x1000, size 0x2000, and name "foo"
- another with base address 0x3000, size 0x4000, and name "bar"
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Information about interrupts generated by the device, encoded as an array
of one or more interrupt specifiers. The format of the data in this property
varies by where the device appears in the interrupt tree. Devices with the same
"interrupt-parent" will use the same format in their interrupts properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
See Important properties for more information. |
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Extended interrupt specifier for device, used as an alternative to
the "interrupts" property.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Optional names given to each interrupt generated by a device.
The interrupts themselves are defined in either "interrupts" or
"interrupts-extended" properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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If present, this refers to the node which handles interrupts generated
by this device.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Human readable string describing the device. Use of this property is
deprecated except as needed on a case-by-case basis.
For details, see "4.1.2 Miscellaneous Properties" in Devicetree
Specification v0.4.
See Important properties for more information. |
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Optional names given to each clock provider in the "clocks" property.
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This property encodes the number of <u32> cells used by address fields
in "reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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This property encodes the number of <u32> cells used by size fields in
"reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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Indicates that the device is capable of coherent DMA operations.
For details, see "2.3.10 dma-coherent" in Devicetree Specification v0.4.
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DMA channel specifiers relevant to the device.
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Optional names given to the DMA channel specifiers in the "dmas" property.
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IO channel specifiers relevant to the device.
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Optional names given to the IO channel specifiers in the "io-channels" property.
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Mailbox / IPM channel specifiers relevant to the device.
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Optional names given to the mbox specifiers in the "mboxes" property.
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Power domain specifiers relevant to the device.
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Optional names given to the power domain specifiers in the "power-domains" property.
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Number of cells in power-domains property
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HW spinlock id relevant to the device.
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Optional names given to the hwlock specifiers in the "hwlocks" property.
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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