Zephyr API Documentation 4.3.99
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
Renesas RA BSP Clock Source Constants

Renesas RA BSP clock source constants. More...

Macros

#define BSP_CLOCKS_SOURCE_PLL   BSP_CLOCKS_SOURCE_CLOCK_PLL
 PLL clock source.
#define BSP_CLOCKS_SOURCE_PLLP   BSP_CLOCKS_SOURCE_CLOCK_PLL
 PLLP clock source.
#define BSP_CLOCKS_SOURCE_PLLQ   BSP_CLOCKS_SOURCE_CLOCK_PLL1Q
 PLLQ clock source.
#define BSP_CLOCKS_SOURCE_PLLR   BSP_CLOCKS_SOURCE_CLOCK_PLL1R
 PLLR clock source.
#define BSP_CLOCKS_SOURCE_PLL2   BSP_CLOCKS_SOURCE_CLOCK_PLL2
 PLL2 clock source.
#define BSP_CLOCKS_SOURCE_PLL2P   BSP_CLOCKS_SOURCE_CLOCK_PLL2
 PLL2P clock source.
#define BSP_CLOCKS_SOURCE_PLL2Q   BSP_CLOCKS_SOURCE_CLOCK_PLL2Q
 PLL2Q clock source.
#define BSP_CLOCKS_SOURCE_PLL2R   BSP_CLOCKS_SOURCE_CLOCK_PLL2R
 PLL2R clock source.

Detailed Description

Renesas RA BSP clock source constants.

Macro Definition Documentation

◆ BSP_CLOCKS_SOURCE_PLL

#define BSP_CLOCKS_SOURCE_PLL   BSP_CLOCKS_SOURCE_CLOCK_PLL

#include <zephyr/drivers/clock_control/renesas_ra_cgc.h>

PLL clock source.

◆ BSP_CLOCKS_SOURCE_PLL2

#define BSP_CLOCKS_SOURCE_PLL2   BSP_CLOCKS_SOURCE_CLOCK_PLL2

#include <zephyr/drivers/clock_control/renesas_ra_cgc.h>

PLL2 clock source.

◆ BSP_CLOCKS_SOURCE_PLL2P

#define BSP_CLOCKS_SOURCE_PLL2P   BSP_CLOCKS_SOURCE_CLOCK_PLL2

#include <zephyr/drivers/clock_control/renesas_ra_cgc.h>

PLL2P clock source.

◆ BSP_CLOCKS_SOURCE_PLL2Q

#define BSP_CLOCKS_SOURCE_PLL2Q   BSP_CLOCKS_SOURCE_CLOCK_PLL2Q

#include <zephyr/drivers/clock_control/renesas_ra_cgc.h>

PLL2Q clock source.

◆ BSP_CLOCKS_SOURCE_PLL2R

#define BSP_CLOCKS_SOURCE_PLL2R   BSP_CLOCKS_SOURCE_CLOCK_PLL2R

#include <zephyr/drivers/clock_control/renesas_ra_cgc.h>

PLL2R clock source.

◆ BSP_CLOCKS_SOURCE_PLLP

#define BSP_CLOCKS_SOURCE_PLLP   BSP_CLOCKS_SOURCE_CLOCK_PLL

#include <zephyr/drivers/clock_control/renesas_ra_cgc.h>

PLLP clock source.

◆ BSP_CLOCKS_SOURCE_PLLQ

#define BSP_CLOCKS_SOURCE_PLLQ   BSP_CLOCKS_SOURCE_CLOCK_PLL1Q

#include <zephyr/drivers/clock_control/renesas_ra_cgc.h>

PLLQ clock source.

◆ BSP_CLOCKS_SOURCE_PLLR

#define BSP_CLOCKS_SOURCE_PLLR   BSP_CLOCKS_SOURCE_CLOCK_PLL1R

#include <zephyr/drivers/clock_control/renesas_ra_cgc.h>

PLLR clock source.