Go to the source code of this file.
◆ BSP_CLOCKS_CLKOUT_DIV_1
| #define BSP_CLOCKS_CLKOUT_DIV_1 (0) |
◆ BSP_CLOCKS_CLKOUT_DIV_128
| #define BSP_CLOCKS_CLKOUT_DIV_128 (7) |
◆ BSP_CLOCKS_CLKOUT_DIV_16
| #define BSP_CLOCKS_CLKOUT_DIV_16 (4) |
◆ BSP_CLOCKS_CLKOUT_DIV_2
| #define BSP_CLOCKS_CLKOUT_DIV_2 (1) |
◆ BSP_CLOCKS_CLKOUT_DIV_32
| #define BSP_CLOCKS_CLKOUT_DIV_32 (5) |
◆ BSP_CLOCKS_CLKOUT_DIV_4
| #define BSP_CLOCKS_CLKOUT_DIV_4 (2) |
◆ BSP_CLOCKS_CLKOUT_DIV_64
| #define BSP_CLOCKS_CLKOUT_DIV_64 (6) |
◆ BSP_CLOCKS_CLKOUT_DIV_8
| #define BSP_CLOCKS_CLKOUT_DIV_8 (3) |
◆ BSP_CLOCKS_SOURCE_PLL
| #define BSP_CLOCKS_SOURCE_PLL BSP_CLOCKS_SOURCE_CLOCK_PLL |
◆ BSP_CLOCKS_SOURCE_PLL2
| #define BSP_CLOCKS_SOURCE_PLL2 BSP_CLOCKS_SOURCE_CLOCK_PLL2 |
◆ BSP_CLOCKS_SOURCE_PLL2P
| #define BSP_CLOCKS_SOURCE_PLL2P BSP_CLOCKS_SOURCE_CLOCK_PLL2 |
◆ BSP_CLOCKS_SOURCE_PLL2Q
| #define BSP_CLOCKS_SOURCE_PLL2Q BSP_CLOCKS_SOURCE_CLOCK_PLL2Q |
◆ BSP_CLOCKS_SOURCE_PLL2R
| #define BSP_CLOCKS_SOURCE_PLL2R BSP_CLOCKS_SOURCE_CLOCK_PLL2R |
◆ BSP_CLOCKS_SOURCE_PLLP
| #define BSP_CLOCKS_SOURCE_PLLP BSP_CLOCKS_SOURCE_CLOCK_PLL |
◆ BSP_CLOCKS_SOURCE_PLLQ
| #define BSP_CLOCKS_SOURCE_PLLQ BSP_CLOCKS_SOURCE_CLOCK_PLL1Q |
◆ BSP_CLOCKS_SOURCE_PLLR
| #define BSP_CLOCKS_SOURCE_PLLR BSP_CLOCKS_SOURCE_CLOCK_PLL1R |
◆ RA_CGC_CLK_DIV
| #define RA_CGC_CLK_DIV |
( |
| clk, |
|
|
| prop, |
|
|
| default_value ) |
Value:
#define DT_NODE_FULL_NAME_UPPER_TOKEN(node_id)
Like DT_NODE_FULL_NAME_TOKEN(), but uppercased.
Definition devicetree.h:623
#define RA_CGC_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value)
Definition renesas_ra_cgc.h:12
#define UTIL_CAT(a,...)
Definition util_internal.h:104
◆ RA_CGC_CLK_SRC
| #define RA_CGC_CLK_SRC |
( |
| node_id | ) |
|
Value:
(BSP_CLOCKS_CLOCK_DISABLED))
#define DT_NODE_HAS_STATUS(node_id, status)
Does a node identifier refer to a node with a status?
Definition devicetree.h:3667
#define COND_CODE_1(_flag, _if_1_code, _else_code)
Insert code depending on whether _flag expands to 1 or not.
Definition util_macro.h:203
◆ RA_CGC_DIV_ADCCLK
| #define RA_CGC_DIV_ADCCLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_BCLK
| #define RA_CGC_DIV_BCLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_BCLKA
| #define RA_CGC_DIV_BCLKA |
( |
| n | ) |
|
Value:UTIL_CAT(BSP_CLOCKS_BCLKA_CLOCK_DIV_, n)
◆ RA_CGC_DIV_CANFDCLK
| #define RA_CGC_DIV_CANFDCLK |
( |
| n | ) |
|
Value:UTIL_CAT(BSP_CLOCKS_CANFD_CLOCK_DIV_, n)
◆ RA_CGC_DIV_CECCLK
| #define RA_CGC_DIV_CECCLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_CLKOUT
| #define RA_CGC_DIV_CLKOUT |
( |
| n | ) |
|
◆ RA_CGC_DIV_CPUCLK
| #define RA_CGC_DIV_CPUCLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_CPUCLK0
| #define RA_CGC_DIV_CPUCLK0 |
( |
| n | ) |
|
◆ RA_CGC_DIV_CPUCLK1
| #define RA_CGC_DIV_CPUCLK1 |
( |
| n | ) |
|
◆ RA_CGC_DIV_DSMIFCLK
| #define RA_CGC_DIV_DSMIFCLK |
( |
| n | ) |
|
Value:UTIL_CAT(BSP_CLOCKS_DSMIF_CLOCK_DIV_, n)
◆ RA_CGC_DIV_ESCCLK
| #define RA_CGC_DIV_ESCCLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_ESWCLK
| #define RA_CGC_DIV_ESWCLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_ESWPHYCLK
| #define RA_CGC_DIV_ESWPHYCLK |
( |
| n | ) |
|
Value:UTIL_CAT(BSP_CLOCKS_ESWPHY_CLOCK_DIV_, n)
◆ RA_CGC_DIV_ETHPHYCLK
| #define RA_CGC_DIV_ETHPHYCLK |
( |
| n | ) |
|
Value:UTIL_CAT(BSP_CLOCKS_ETHPHY_CLOCK_DIV_, n)
◆ RA_CGC_DIV_FCLK
| #define RA_CGC_DIV_FCLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_GPTCLK
| #define RA_CGC_DIV_GPTCLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_I3CCLK
| #define RA_CGC_DIV_I3CCLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_ICLK
| #define RA_CGC_DIV_ICLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_IICCLK
| #define RA_CGC_DIV_IICCLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_LCDCLK
| #define RA_CGC_DIV_LCDCLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_MRICLK
| #define RA_CGC_DIV_MRICLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_MRPCLK
| #define RA_CGC_DIV_MRPCLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_NPUCLK
| #define RA_CGC_DIV_NPUCLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_OCTASPICLK
| #define RA_CGC_DIV_OCTASPICLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_PCLKA
| #define RA_CGC_DIV_PCLKA |
( |
| n | ) |
|
◆ RA_CGC_DIV_PCLKB
| #define RA_CGC_DIV_PCLKB |
( |
| n | ) |
|
◆ RA_CGC_DIV_PCLKC
| #define RA_CGC_DIV_PCLKC |
( |
| n | ) |
|
◆ RA_CGC_DIV_PCLKD
| #define RA_CGC_DIV_PCLKD |
( |
| n | ) |
|
◆ RA_CGC_DIV_PCLKE
| #define RA_CGC_DIV_PCLKE |
( |
| n | ) |
|
◆ RA_CGC_DIV_PLL
| #define RA_CGC_DIV_PLL |
( |
| n | ) |
|
◆ RA_CGC_DIV_PLL2
| #define RA_CGC_DIV_PLL2 |
( |
| n | ) |
|
◆ RA_CGC_DIV_PLL2P
| #define RA_CGC_DIV_PLL2P |
( |
| n | ) |
|
◆ RA_CGC_DIV_PLL2Q
| #define RA_CGC_DIV_PLL2Q |
( |
| n | ) |
|
◆ RA_CGC_DIV_PLL2R
| #define RA_CGC_DIV_PLL2R |
( |
| n | ) |
|
◆ RA_CGC_DIV_PLLP
| #define RA_CGC_DIV_PLLP |
( |
| n | ) |
|
◆ RA_CGC_DIV_PLLQ
| #define RA_CGC_DIV_PLLQ |
( |
| n | ) |
|
◆ RA_CGC_DIV_PLLR
| #define RA_CGC_DIV_PLLR |
( |
| n | ) |
|
◆ RA_CGC_DIV_SCICLK
| #define RA_CGC_DIV_SCICLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_SCISPICLK
| #define RA_CGC_DIV_SCISPICLK |
( |
| n | ) |
|
Value:UTIL_CAT(BSP_CLOCKS_SCISPI_CLOCK_DIV_, n)
◆ RA_CGC_DIV_SPICLK
| #define RA_CGC_DIV_SPICLK |
( |
| n | ) |
|
◆ RA_CGC_DIV_U60CLK
| #define RA_CGC_DIV_U60CLK |
( |
| n | ) |
|
Value:UTIL_CAT(BSP_CLOCKS_USB60_CLOCK_DIV_, n)
◆ RA_CGC_DIV_UCLK
| #define RA_CGC_DIV_UCLK |
( |
| n | ) |
|
◆ RA_CGC_PROP_HAS_STATUS_OKAY_OR
| #define RA_CGC_PROP_HAS_STATUS_OKAY_OR |
( |
| node_id, |
|
|
| prop, |
|
|
| default_value ) |
Value:
#define DT_PROP(node_id, prop)
Get a devicetree property value.
Definition devicetree.h:762