Zephyr API Documentation 4.4.99
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WCH CH32H41x pin control helpers

Macros for pin control configuration of WCH CH32H41x. More...

Files

file  ch32h41x-pinctrl.h
 Devicetree pin control helpers for WCH CH32H41x.

Macros

#define CH32H41X_PINMUX_PORT_PA   0
 Port PA selector.
#define CH32H41X_PINMUX_PORT_PB   1
 Port PB selector.
#define CH32H41X_PINMUX_PORT_PC   2
 Port PC selector.
#define CH32H41X_PINMUX_PORT_PD   3
 Port PD selector.
#define CH32H41X_PINMUX_PORT_PE   4
 Port PE selector.
#define CH32H41X_PINMUX_PORT_PF   5
 Port PF selector.
#define CH32H41X_PINMUX_PORT_MASK   0x007
 Mask for the port field of the pinmux cell.
#define CH32H41X_PINMUX_PIN_MASK   0x078
 Mask for the pin field of the pinmux cell.
#define CH32H41X_PINMUX_AF_MASK   0x780
 Mask for the alternate-function field of the pinmux cell.
#define CH32H41X_PINMUX(port, pin, af)
 Encode a port, pin and alternate function into a pinmux cell.
#define USART1_TX_PA9_AF7   CH32H41X_PINMUX(PA, 9, 7)
 USART1 TX on PA9 (AF7).
#define USART1_RX_PA10_AF7   CH32H41X_PINMUX(PA, 10, 7)
 USART1 RX on PA10 (AF7).
#define USART8_TX_PB4_AF11   CH32H41X_PINMUX(PB, 4, 11)
 USART8 TX on PB4 (AF11).

Detailed Description

Macros for pin control configuration of WCH CH32H41x.

The CH32H41x uses an STM32-style per-pin alternate-function mux: each GPIO pin has a 4-bit AF selector in the AFIO GPIOx_AFLR/AFHR registers, rather than the CH32V20x/30x AFIO remap (PCFR) model.

Encoding (packed into the pinmux cell):

  • bits 0..2 : port (0=PA, 1=PB, ...)
  • bits 3..6 : pin (0..15)
  • bits 7..10 : alternate function (0..15)

Macro Definition Documentation

◆ CH32H41X_PINMUX

#define CH32H41X_PINMUX ( port,
pin,
af )

#include <zephyr/dt-bindings/pinctrl/ch32h41x-pinctrl.h>

Value:
((CH32H41X_PINMUX_PORT_##port) | ((pin) << 3) | ((af) << 7))

Encode a port, pin and alternate function into a pinmux cell.

Parameters
portPort name (PA, PB, ...)
pinPin number (0..15)
afAlternate function (0..15)

◆ CH32H41X_PINMUX_AF_MASK

#define CH32H41X_PINMUX_AF_MASK   0x780

#include <zephyr/dt-bindings/pinctrl/ch32h41x-pinctrl.h>

Mask for the alternate-function field of the pinmux cell.

◆ CH32H41X_PINMUX_PIN_MASK

#define CH32H41X_PINMUX_PIN_MASK   0x078

#include <zephyr/dt-bindings/pinctrl/ch32h41x-pinctrl.h>

Mask for the pin field of the pinmux cell.

◆ CH32H41X_PINMUX_PORT_MASK

#define CH32H41X_PINMUX_PORT_MASK   0x007

#include <zephyr/dt-bindings/pinctrl/ch32h41x-pinctrl.h>

Mask for the port field of the pinmux cell.

◆ CH32H41X_PINMUX_PORT_PA

#define CH32H41X_PINMUX_PORT_PA   0

#include <zephyr/dt-bindings/pinctrl/ch32h41x-pinctrl.h>

Port PA selector.

◆ CH32H41X_PINMUX_PORT_PB

#define CH32H41X_PINMUX_PORT_PB   1

#include <zephyr/dt-bindings/pinctrl/ch32h41x-pinctrl.h>

Port PB selector.

◆ CH32H41X_PINMUX_PORT_PC

#define CH32H41X_PINMUX_PORT_PC   2

#include <zephyr/dt-bindings/pinctrl/ch32h41x-pinctrl.h>

Port PC selector.

◆ CH32H41X_PINMUX_PORT_PD

#define CH32H41X_PINMUX_PORT_PD   3

#include <zephyr/dt-bindings/pinctrl/ch32h41x-pinctrl.h>

Port PD selector.

◆ CH32H41X_PINMUX_PORT_PE

#define CH32H41X_PINMUX_PORT_PE   4

#include <zephyr/dt-bindings/pinctrl/ch32h41x-pinctrl.h>

Port PE selector.

◆ CH32H41X_PINMUX_PORT_PF

#define CH32H41X_PINMUX_PORT_PF   5

#include <zephyr/dt-bindings/pinctrl/ch32h41x-pinctrl.h>

Port PF selector.

◆ USART1_RX_PA10_AF7

#define USART1_RX_PA10_AF7   CH32H41X_PINMUX(PA, 10, 7)

#include <zephyr/dt-bindings/pinctrl/ch32h41x-pinctrl.h>

USART1 RX on PA10 (AF7).

◆ USART1_TX_PA9_AF7

#define USART1_TX_PA9_AF7   CH32H41X_PINMUX(PA, 9, 7)

#include <zephyr/dt-bindings/pinctrl/ch32h41x-pinctrl.h>

USART1 TX on PA9 (AF7).

◆ USART8_TX_PB4_AF11

#define USART8_TX_PB4_AF11   CH32H41X_PINMUX(PB, 4, 11)

#include <zephyr/dt-bindings/pinctrl/ch32h41x-pinctrl.h>

USART8 TX on PB4 (AF11).