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Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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Devicetree pin control helpers for WCH CH32H41x. More...
Go to the source code of this file.
Macros | |
| #define | CH32H41X_PINMUX_PORT_PA 0 |
| Port PA selector. | |
| #define | CH32H41X_PINMUX_PORT_PB 1 |
| Port PB selector. | |
| #define | CH32H41X_PINMUX_PORT_PC 2 |
| Port PC selector. | |
| #define | CH32H41X_PINMUX_PORT_PD 3 |
| Port PD selector. | |
| #define | CH32H41X_PINMUX_PORT_PE 4 |
| Port PE selector. | |
| #define | CH32H41X_PINMUX_PORT_PF 5 |
| Port PF selector. | |
| #define | CH32H41X_PINMUX_PORT_MASK 0x007 |
| Mask for the port field of the pinmux cell. | |
| #define | CH32H41X_PINMUX_PIN_MASK 0x078 |
| Mask for the pin field of the pinmux cell. | |
| #define | CH32H41X_PINMUX_AF_MASK 0x780 |
| Mask for the alternate-function field of the pinmux cell. | |
| #define | CH32H41X_PINMUX(port, pin, af) |
| Encode a port, pin and alternate function into a pinmux cell. | |
| #define | USART1_TX_PA9_AF7 CH32H41X_PINMUX(PA, 9, 7) |
| USART1 TX on PA9 (AF7). | |
| #define | USART1_RX_PA10_AF7 CH32H41X_PINMUX(PA, 10, 7) |
| USART1 RX on PA10 (AF7). | |
| #define | USART8_TX_PB4_AF11 CH32H41X_PINMUX(PB, 4, 11) |
| USART8 TX on PB4 (AF11). | |
Devicetree pin control helpers for WCH CH32H41x.