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Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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Macros for pin control configuration of Renesas RZ/A SoCs. More...
Files | |
| file | pinctrl-rza-common.h |
| Devicetree pin control helpers for Renesas RZ/A. | |
Macros | |
| #define | RZA_PINMUX(port, pin, func) |
| Create an encoded value containing port/pin/function information. | |
| #define | RZA_FILTER_SET(filnum, filclksel) |
| Encode filter stage count and clock selection into one configuration value. | |
Renesas RZ/A digital noise filter options | |
Set the number of filter stages (FILNUM) and the sampling clock divider (FILCLKSEL). | |
| #define | RZA_FILNUM_4_STAGE 0 |
| FILNUM: 4-stage filter. | |
| #define | RZA_FILNUM_8_STAGE 1 |
| FILNUM: 8-stage filter. | |
| #define | RZA_FILNUM_12_STAGE 2 |
| FILNUM: 12-stage filter. | |
| #define | RZA_FILNUM_16_STAGE 3 |
| FILNUM: 16-stage filter. | |
| #define | RZA_FILCLKSEL_NOT_DIV 0 |
| FILCLKSEL: no division. | |
| #define | RZA_FILCLKSEL_DIV_9000 1 |
| FILCLKSEL: divided by 9000. | |
| #define | RZA_FILCLKSEL_DIV_18000 2 |
| FILCLKSEL: divided by 18000. | |
| #define | RZA_FILCLKSEL_DIV_36000 3 |
| FILCLKSEL: divided by 36000. | |
Macros for pin control configuration of Renesas RZ/A SoCs.
General-purpose pins are configured with the RZA_PINMUX() macro, which takes three fields:
port — the port identifier, one of the PORT_* values.pin — the pin number within that port.func — the alternate-function number selecting the peripheral signal routed to the pin, taken from the SoC's Pin Function Controller table; it has no symbolic macro and is passed as a plain integer.Dedicated-function pins that sit outside the general-purpose port matrix are referenced directly through their BSP_IO_* identifiers, covering debug (BSP_IO_NMI, BSP_IO_TMS_SWDIO, BSP_IO_TDO), audio clocks, SD/MMC, QSPI and octal-memory flash, RIIC (I2C) and watchdog overflow.
An optional digital noise filter can be applied to a pin group with RZA_FILTER_SET(), built from a stage count (RZA_FILNUM_*) and a sampling clock divider (RZA_FILCLKSEL_*).
| #define RZA_FILCLKSEL_DIV_18000 2 |
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rza-common.h>
FILCLKSEL: divided by 18000.
| #define RZA_FILCLKSEL_DIV_36000 3 |
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rza-common.h>
FILCLKSEL: divided by 36000.
| #define RZA_FILCLKSEL_DIV_9000 1 |
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rza-common.h>
FILCLKSEL: divided by 9000.
| #define RZA_FILCLKSEL_NOT_DIV 0 |
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rza-common.h>
FILCLKSEL: no division.
| #define RZA_FILNUM_12_STAGE 2 |
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rza-common.h>
FILNUM: 12-stage filter.
| #define RZA_FILNUM_16_STAGE 3 |
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rza-common.h>
FILNUM: 16-stage filter.
| #define RZA_FILNUM_4_STAGE 0 |
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rza-common.h>
FILNUM: 4-stage filter.
| #define RZA_FILNUM_8_STAGE 1 |
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rza-common.h>
FILNUM: 8-stage filter.
| #define RZA_FILTER_SET | ( | filnum, | |
| filclksel ) |
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rza-common.h>
Encode filter stage count and clock selection into one configuration value.
Encoding:
| filnum | Filter stage selection (RZA_FILNUM_*). |
| filclksel | Filter clock selection (RZA_FILCLKSEL_*). |
| #define RZA_PINMUX | ( | port, | |
| pin, | |||
| func ) |
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rza-common.h>
Create an encoded value containing port/pin/function information.
| port | Port identifier (PORT_00..PORT_18). |
| pin | Pin number within the port. |
| func | Pin function selector. |