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4.0.0-rc2
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intc_vim.h
Go to the documentation of this file.
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/* Copyright (C) 2023 BeagleBoard.org Foundation
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* Copyright (C) 2023 S Prashanth
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_INTC_VIM_H_
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#define ZEPHYR_DRIVERS_INTC_VIM_H_
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#include <
stdint.h
>
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#include <
zephyr/devicetree.h
>
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#include <
zephyr/dt-bindings/interrupt-controller/ti-vim.h
>
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#include <
zephyr/sys/util_macro.h
>
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#define VIM_BASE_ADDR DT_REG_ADDR(DT_INST(0, ti_vim))
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#define VIM_MAX_IRQ_PER_GROUP (32)
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#define VIM_MAX_GROUP_NUM ((uint32_t)(CONFIG_NUM_IRQS / VIM_MAX_IRQ_PER_GROUP))
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#define VIM_GET_IRQ_GROUP_NUM(n) ((uint32_t)((n) / VIM_MAX_IRQ_PER_GROUP))
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#define VIM_GET_IRQ_BIT_NUM(n) ((uint32_t)((n) % VIM_MAX_IRQ_PER_GROUP))
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#define VIM_PRI_INT_MAX (15)
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#define VIM_PID (VIM_BASE_ADDR + 0x0000)
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#define VIM_INFO (VIM_BASE_ADDR + 0x0004)
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#define VIM_PRIIRQ (VIM_BASE_ADDR + 0x0008)
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#define VIM_PRIFIQ (VIM_BASE_ADDR + 0x000C)
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#define VIM_IRQGSTS (VIM_BASE_ADDR + 0x0010)
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#define VIM_FIQGSTS (VIM_BASE_ADDR + 0x0014)
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#define VIM_IRQVEC (VIM_BASE_ADDR + 0x0018)
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#define VIM_FIQVEC (VIM_BASE_ADDR + 0x001C)
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#define VIM_ACTIRQ (VIM_BASE_ADDR + 0x0020)
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#define VIM_ACTFIQ (VIM_BASE_ADDR + 0x0024)
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#define VIM_DEDVEC (VIM_BASE_ADDR + 0x0030)
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#define VIM_RAW(n) (VIM_BASE_ADDR + (0x400) + ((n) * 0x20))
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#define VIM_STS(n) (VIM_BASE_ADDR + (0x404) + ((n) * 0x20))
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#define VIM_INTR_EN_SET(n) (VIM_BASE_ADDR + (0x408) + ((n) * 0x20))
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#define VIM_INTR_EN_CLR(n) (VIM_BASE_ADDR + (0x40c) + ((n) * 0x20))
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#define VIM_IRQSTS(n) (VIM_BASE_ADDR + (0x410) + ((n) * 0x20))
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#define VIM_FIQSTS(n) (VIM_BASE_ADDR + (0x414) + ((n) * 0x20))
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#define VIM_INTMAP(n) (VIM_BASE_ADDR + (0x418) + ((n) * 0x20))
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#define VIM_INTTYPE(n) (VIM_BASE_ADDR + (0x41c) + ((n) * 0x20))
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#define VIM_PRI_INT(n) (VIM_BASE_ADDR + (0x1000) + ((n) * 0x4))
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#define VIM_VEC_INT(n) (VIM_BASE_ADDR + (0x2000) + ((n) * 0x4))
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/* RAW */
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#define VIM_GRP_RAW_STS_MASK (BIT_MASK(32))
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#define VIM_GRP_RAW_STS_SHIFT (0x00000000U)
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#define VIM_GRP_RAW_STS_RESETVAL (0x00000000U)
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#define VIM_GRP_RAW_STS_MAX (BIT_MASK(32))
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#define VIM_GRP_RAW_RESETVAL (0x00000000U)
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/* STS */
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#define VIM_GRP_STS_MSK_MASK (BIT_MASK(32))
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#define VIM_GRP_STS_MSK_SHIFT (0x00000000U)
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#define VIM_GRP_STS_MSK_RESETVAL (0x00000000U)
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#define VIM_GRP_STS_MSK_MAX (BIT_MASK(32))
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#define VIM_GRP_STS_RESETVAL (0x00000000U)
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/* INTR_EN_SET */
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#define VIM_GRP_INTR_EN_SET_MSK_MASK (BIT_MASK(32))
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#define VIM_GRP_INTR_EN_SET_MSK_SHIFT (0x00000000U)
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#define VIM_GRP_INTR_EN_SET_MSK_RESETVAL (0x00000000U)
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#define VIM_GRP_INTR_EN_SET_MSK_MAX (BIT_MASK(32))
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#define VIM_GRP_INTR_EN_SET_RESETVAL (0x00000000U)
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/* INTR_EN_CLR */
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#define VIM_GRP_INTR_EN_CLR_MSK_MASK (BIT_MASK(32))
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#define VIM_GRP_INTR_EN_CLR_MSK_SHIFT (0x00000000U)
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#define VIM_GRP_INTR_EN_CLR_MSK_RESETVAL (0x00000000U)
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#define VIM_GRP_INTR_EN_CLR_MSK_MAX (BIT_MASK(32))
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#define VIM_GRP_INTR_EN_CLR_RESETVAL (0x00000000U)
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/* IRQSTS */
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#define VIM_GRP_IRQSTS_MSK_MASK (BIT_MASK(32))
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#define VIM_GRP_IRQSTS_MSK_SHIFT (0x00000000U)
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#define VIM_GRP_IRQSTS_MSK_RESETVAL (0x00000000U)
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#define VIM_GRP_IRQSTS_MSK_MAX (BIT_MASK(32))
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#define VIM_GRP_IRQSTS_RESETVAL (0x00000000U)
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/* FIQSTS */
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#define VIM_GRP_FIQSTS_MSK_MASK (BIT_MASK(32))
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#define VIM_GRP_FIQSTS_MSK_SHIFT (0x00000000U)
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#define VIM_GRP_FIQSTS_MSK_RESETVAL (0x00000000U)
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#define VIM_GRP_FIQSTS_MSK_MAX (BIT_MASK(32))
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#define VIM_GRP_FIQSTS_RESETVAL (0x00000000U)
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/* INTMAP */
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#define VIM_GRP_INTMAP_MSK_MASK (BIT_MASK(32))
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#define VIM_GRP_INTMAP_MSK_SHIFT (0x00000000U)
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#define VIM_GRP_INTMAP_MSK_RESETVAL (0x00000000U)
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#define VIM_GRP_INTMAP_MSK_MAX (BIT_MASK(32))
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#define VIM_GRP_INTMAP_RESETVAL (0x00000000U)
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/* INTTYPE */
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#define VIM_GRP_INTTYPE_MSK_MASK (BIT_MASK(32))
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#define VIM_GRP_INTTYPE_MSK_SHIFT (0x00000000U)
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#define VIM_GRP_INTTYPE_MSK_RESETVAL (0x00000000U)
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#define VIM_GRP_INTTYPE_MSK_MAX (BIT_MASK(32))
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#define VIM_GRP_INTTYPE_RESETVAL (0x00000000U)
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/* INT */
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#define VIM_PRI_INT_VAL_MASK (BIT_MASK(4))
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#define VIM_PRI_INT_VAL_SHIFT (0x00000000U)
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#define VIM_PRI_INT_VAL_RESETVAL (BIT_MASK(4))
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#define VIM_PRI_INT_VAL_MAX (BIT_MASK(4))
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#define VIM_PRI_INT_RESETVAL (BIT_MASK(4))
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/* INT */
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#define VIM_VEC_INT_VAL_MASK (0xFFFFFFFCU)
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#define VIM_VEC_INT_VAL_SHIFT (0x00000002U)
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#define VIM_VEC_INT_VAL_RESETVAL (0x00000000U)
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#define VIM_VEC_INT_VAL_MAX (BIT_MASK(30))
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#define VIM_VEC_INT_RESETVAL (0x00000000U)
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/* INFO */
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#define VIM_INFO_INTERRUPTS_MASK (BIT_MASK(11))
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#define VIM_INFO_INTERRUPTS_SHIFT (0x00000000U)
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#define VIM_INFO_INTERRUPTS_RESETVAL (0x00000400U)
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#define VIM_INFO_INTERRUPTS_MAX (BIT_MASK(11))
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#define VIM_INFO_RESETVAL (0x00000400U)
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/* PRIIRQ */
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#define VIM_PRIIRQ_VALID_MASK (0x80000000U)
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#define VIM_PRIIRQ_VALID_SHIFT (BIT_MASK(5))
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#define VIM_PRIIRQ_VALID_RESETVAL (0x00000000U)
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#define VIM_PRIIRQ_VALID_MAX (0x00000001U)
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#define VIM_PRIIRQ_VALID_VAL_TRUE (0x1U)
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#define VIM_PRIIRQ_VALID_VAL_FALSE (0x0U)
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#define VIM_PRIIRQ_PRI_MASK (0x000F0000U)
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#define VIM_PRIIRQ_PRI_SHIFT (0x00000010U)
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#define VIM_PRIIRQ_PRI_RESETVAL (0x00000000U)
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#define VIM_PRIIRQ_PRI_MAX (BIT_MASK(4))
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#define VIM_PRIIRQ_NUM_MASK (BIT_MASK(10))
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#define VIM_PRIIRQ_NUM_SHIFT (0x00000000U)
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#define VIM_PRIIRQ_NUM_RESETVAL (0x00000000U)
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#define VIM_PRIIRQ_NUM_MAX (BIT_MASK(10))
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#define VIM_PRIIRQ_RESETVAL (0x00000000U)
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/* PRIFIQ */
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#define VIM_PRIFIQ_VALID_MASK (0x80000000U)
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#define VIM_PRIFIQ_VALID_SHIFT (BIT_MASK(5))
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#define VIM_PRIFIQ_VALID_RESETVAL (0x00000000U)
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#define VIM_PRIFIQ_VALID_MAX (0x00000001U)
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#define VIM_PRIFIQ_VALID_VAL_TRUE (0x1U)
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#define VIM_PRIFIQ_VALID_VAL_FALSE (0x0U)
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#define VIM_PRIFIQ_PRI_MASK (0x000F0000U)
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#define VIM_PRIFIQ_PRI_SHIFT (0x00000010U)
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#define VIM_PRIFIQ_PRI_RESETVAL (0x00000000U)
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#define VIM_PRIFIQ_PRI_MAX (BIT_MASK(4))
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#define VIM_PRIFIQ_NUM_MASK (BIT_MASK(10))
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#define VIM_PRIFIQ_NUM_SHIFT (0x00000000U)
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#define VIM_PRIFIQ_NUM_RESETVAL (0x00000000U)
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#define VIM_PRIFIQ_NUM_MAX (BIT_MASK(10))
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#define VIM_PRIFIQ_RESETVAL (0x00000000U)
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/* IRQGSTS */
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#define VIM_IRQGSTS_STS_MASK (BIT_MASK(32))
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#define VIM_IRQGSTS_STS_SHIFT (0x00000000U)
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#define VIM_IRQGSTS_STS_RESETVAL (0x00000000U)
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#define VIM_IRQGSTS_STS_MAX (BIT_MASK(32))
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#define VIM_IRQGSTS_RESETVAL (0x00000000U)
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/* FIQGSTS */
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#define VIM_FIQGSTS_STS_MASK (BIT_MASK(32))
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#define VIM_FIQGSTS_STS_SHIFT (0x00000000U)
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#define VIM_FIQGSTS_STS_RESETVAL (0x00000000U)
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#define VIM_FIQGSTS_STS_MAX (BIT_MASK(32))
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#define VIM_FIQGSTS_RESETVAL (0x00000000U)
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/* IRQVEC */
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#define VIM_IRQVEC_ADDR_MASK (0xFFFFFFFCU)
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#define VIM_IRQVEC_ADDR_SHIFT (0x00000002U)
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#define VIM_IRQVEC_ADDR_RESETVAL (0x00000000U)
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#define VIM_IRQVEC_ADDR_MAX (BIT_MASK(30))
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#define VIM_IRQVEC_RESETVAL (0x00000000U)
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/* FIQVEC */
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#define VIM_FIQVEC_ADDR_MASK (0xFFFFFFFCU)
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#define VIM_FIQVEC_ADDR_SHIFT (0x00000002U)
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#define VIM_FIQVEC_ADDR_RESETVAL (0x00000000U)
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#define VIM_FIQVEC_ADDR_MAX (BIT_MASK(30))
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#define VIM_FIQVEC_RESETVAL (0x00000000U)
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/* ACTIRQ */
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#define VIM_ACTIRQ_VALID_MASK (0x80000000U)
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#define VIM_ACTIRQ_VALID_SHIFT (BIT_MASK(5))
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#define VIM_ACTIRQ_VALID_RESETVAL (0x00000000U)
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#define VIM_ACTIRQ_VALID_MAX (0x00000001U)
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#define VIM_ACTIRQ_VALID_VAL_TRUE (0x1U)
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#define VIM_ACTIRQ_VALID_VAL_FALSE (0x0U)
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#define VIM_ACTIRQ_PRI_MASK (0x000F0000U)
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#define VIM_ACTIRQ_PRI_SHIFT (0x00000010U)
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#define VIM_ACTIRQ_PRI_RESETVAL (0x00000000U)
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#define VIM_ACTIRQ_PRI_MAX (BIT_MASK(4))
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#define VIM_ACTIRQ_NUM_MASK (BIT_MASK(10))
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#define VIM_ACTIRQ_NUM_SHIFT (0x00000000U)
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#define VIM_ACTIRQ_NUM_RESETVAL (0x00000000U)
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#define VIM_ACTIRQ_NUM_MAX (BIT_MASK(10))
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#define VIM_ACTIRQ_RESETVAL (0x00000000U)
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/* ACTFIQ */
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#define VIM_ACTFIQ_VALID_MASK (0x80000000U)
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#define VIM_ACTFIQ_VALID_SHIFT (BIT_MASK(5))
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#define VIM_ACTFIQ_VALID_RESETVAL (0x00000000U)
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#define VIM_ACTFIQ_VALID_MAX (0x00000001U)
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#define VIM_ACTFIQ_VALID_VAL_TRUE (0x1U)
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#define VIM_ACTFIQ_VALID_VAL_FALSE (0x0U)
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#define VIM_ACTFIQ_PRI_MASK (0x000F0000U)
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#define VIM_ACTFIQ_PRI_SHIFT (0x00000010U)
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#define VIM_ACTFIQ_PRI_RESETVAL (0x00000000U)
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#define VIM_ACTFIQ_PRI_MAX (BIT_MASK(4))
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#define VIM_ACTFIQ_NUM_MASK (BIT_MASK(10))
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#define VIM_ACTFIQ_NUM_SHIFT (0x00000000U)
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#define VIM_ACTFIQ_NUM_RESETVAL (0x00000000U)
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#define VIM_ACTFIQ_NUM_MAX (BIT_MASK(10))
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#define VIM_ACTFIQ_RESETVAL (0x00000000U)
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/* DEDVEC */
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#define VIM_DEDVEC_ADDR_MASK (0xFFFFFFFCU)
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#define VIM_DEDVEC_ADDR_SHIFT (0x00000002U)
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#define VIM_DEDVEC_ADDR_RESETVAL (0x00000000U)
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#define VIM_DEDVEC_ADDR_MAX (BIT_MASK(30))
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#define VIM_DEDVEC_RESETVAL (0x00000000U)
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/*
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* VIM Driver Interface Functions
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*/
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unsigned
int
z_vim_irq_get_active(
void
);
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void
z_vim_irq_eoi(
unsigned
int
irq);
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void
z_vim_irq_init(
void
);
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void
z_vim_irq_priority_set(
unsigned
int
irq,
unsigned
int
prio,
uint32_t
flags
);
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void
z_vim_irq_enable(
unsigned
int
irq);
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void
z_vim_irq_disable(
unsigned
int
irq);
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int
z_vim_irq_is_enabled(
unsigned
int
irq);
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void
z_vim_arm_enter_irq(
int
irq);
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#endif
/* ZEPHYR_DRIVERS_INTC_VIM_H_ */
devicetree.h
Devicetree main header.
flags
flags
Definition
parser.h:96
stdint.h
uint32_t
__UINT32_TYPE__ uint32_t
Definition
stdint.h:90
ti-vim.h
util_macro.h
Macro utilities.
zephyr
drivers
interrupt_controller
intc_vim.h
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