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Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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ARM64 specific memory attribute definitions for devicetree. More...
#include <zephyr/dt-bindings/memory-attr/memory-attr.h>Go to the source code of this file.
Macros | |
| #define | DT_MEM_ARM64_MASK DT_MEM_ARCH_ATTR_MASK |
| Mask for ARM64 architecture-specific memory attribute bits. | |
| #define | DT_MEM_ARM64_GET(x) |
| Extract ARM64-specific bits from a DT memory attribute value. | |
| #define | DT_MEM_ARM64(x) |
| Shift a raw ARM64 attribute into the architecture field. | |
| #define | ATTR_ARM64_CACHE_WB BIT(1) |
| Write-Back cache policy (only meaningful with DT_MEM_CACHEABLE). | |
| #define | DT_MEM_ARM64_MMU_NORMAL_NC (0) |
| Normal non-cacheable memory. | |
| #define | DT_MEM_ARM64_MMU_NORMAL_WT (DT_MEM_CACHEABLE) |
| Normal write-through cacheable memory. | |
| #define | DT_MEM_ARM64_MMU_NORMAL |
| Normal write-back cacheable memory. | |
| #define | DT_MEM_ARM64_MMU_UNKNOWN DT_MEM_ARCH_ATTR_UNKNOWN |
| DT value for unknown or unsupported memory type. | |
ARM64 specific memory attribute definitions for devicetree.
Copyright (c) 2025 Advanced Micro Devices, Inc.
SPDX-License-Identifier: Apache-2.0