Zephyr API Documentation 4.0.99
A Scalable Open Source RTOS
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arm_mmu.h File Reference

Go to the source code of this file.

Data Structures

struct  arm_mmu_region
 
struct  arm_mmu_config
 

Macros

#define MT_STRONGLY_ORDERED   BIT(0)
 
#define MT_DEVICE   BIT(1)
 
#define MT_NORMAL   BIT(2)
 
#define MT_MASK   0x7
 
#define MPERM_R   BIT(3)
 
#define MPERM_W   BIT(4)
 
#define MPERM_X   BIT(5)
 
#define MPERM_UNPRIVILEGED   BIT(6)
 
#define MATTR_NON_SECURE   BIT(7)
 
#define MATTR_NON_GLOBAL   BIT(8)
 
#define MATTR_SHARED   BIT(9)
 
#define MATTR_CACHE_OUTER_WB_WA   BIT(10)
 
#define MATTR_CACHE_OUTER_WT_nWA   BIT(11)
 
#define MATTR_CACHE_OUTER_WB_nWA   BIT(12)
 
#define MATTR_CACHE_INNER_WB_WA   BIT(13)
 
#define MATTR_CACHE_INNER_WT_nWA   BIT(14)
 
#define MATTR_CACHE_INNER_WB_nWA   BIT(15)
 
#define MATTR_MAY_MAP_L1_SECTION   BIT(16)
 
#define MMU_REGION_ENTRY(_name, _base_pa, _base_va, _size, _attrs)
 
#define MMU_REGION_FLAT_ENTRY(name, adr, sz, attrs)
 
#define MMU_REGION_DT_FLAT_ENTRY(node_id, attrs)
 
#define MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY(compat, attr)
 

Variables

const struct arm_mmu_config mmu_config
 

Macro Definition Documentation

◆ MATTR_CACHE_INNER_WB_nWA

#define MATTR_CACHE_INNER_WB_nWA   BIT(15)

◆ MATTR_CACHE_INNER_WB_WA

#define MATTR_CACHE_INNER_WB_WA   BIT(13)

◆ MATTR_CACHE_INNER_WT_nWA

#define MATTR_CACHE_INNER_WT_nWA   BIT(14)

◆ MATTR_CACHE_OUTER_WB_nWA

#define MATTR_CACHE_OUTER_WB_nWA   BIT(12)

◆ MATTR_CACHE_OUTER_WB_WA

#define MATTR_CACHE_OUTER_WB_WA   BIT(10)

◆ MATTR_CACHE_OUTER_WT_nWA

#define MATTR_CACHE_OUTER_WT_nWA   BIT(11)

◆ MATTR_MAY_MAP_L1_SECTION

#define MATTR_MAY_MAP_L1_SECTION   BIT(16)

◆ MATTR_NON_GLOBAL

#define MATTR_NON_GLOBAL   BIT(8)

◆ MATTR_NON_SECURE

#define MATTR_NON_SECURE   BIT(7)

◆ MATTR_SHARED

#define MATTR_SHARED   BIT(9)

◆ MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY

#define MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY ( compat,
attr )
Value:
#define DT_FOREACH_STATUS_OKAY_VARGS(compat, fn,...)
Invokes fn for each status okay node of a compatible with multiple arguments.
Definition devicetree.h:3415
#define MMU_REGION_DT_FLAT_ENTRY(node_id, attrs)
Definition arm_mmu.h:86

◆ MMU_REGION_DT_FLAT_ENTRY

#define MMU_REGION_DT_FLAT_ENTRY ( node_id,
attrs )
Value:
DT_REG_ADDR(node_id), \
DT_REG_SIZE(node_id), \
attrs),
#define DT_NODE_FULL_NAME(node_id)
Get a devicetree node's name with unit-address as a string literal.
Definition devicetree.h:527
#define DT_REG_ADDR(node_id)
Get a node's (only) register block address.
Definition devicetree.h:2440
#define DT_REG_SIZE(node_id)
Get a node's (only) register block size.
Definition devicetree.h:2461
#define MMU_REGION_FLAT_ENTRY(name, adr, sz, attrs)
Definition arm_mmu.h:67

◆ MMU_REGION_ENTRY

#define MMU_REGION_ENTRY ( _name,
_base_pa,
_base_va,
_size,
_attrs )
Value:
{\
.name = _name, \
.base_pa = _base_pa, \
.base_va = _base_va, \
.size = _size, \
.attrs = _attrs, \
}

◆ MMU_REGION_FLAT_ENTRY

#define MMU_REGION_FLAT_ENTRY ( name,
adr,
sz,
attrs )
Value:
MMU_REGION_ENTRY(name, adr, adr, sz, attrs)
#define MMU_REGION_ENTRY(_name, _base_pa, _base_va, _size, _attrs)
Definition arm_mmu.h:58

◆ MPERM_R

#define MPERM_R   BIT(3)

◆ MPERM_UNPRIVILEGED

#define MPERM_UNPRIVILEGED   BIT(6)

◆ MPERM_W

#define MPERM_W   BIT(4)

◆ MPERM_X

#define MPERM_X   BIT(5)

◆ MT_DEVICE

#define MT_DEVICE   BIT(1)

◆ MT_MASK

#define MT_MASK   0x7

◆ MT_NORMAL

#define MT_NORMAL   BIT(2)

◆ MT_STRONGLY_ORDERED

#define MT_STRONGLY_ORDERED   BIT(0)

Variable Documentation

◆ mmu_config

const struct arm_mmu_config mmu_config
extern