arm_mmu.h File Reference

#include <zephyr/dt-bindings/memory-attr/memory-attr-arm64.h>
#include <stdint.h>
#include <stdlib.h>

Go to the source code of this file.

Data Structures
struct	arm_mmu_region
struct	arm_mmu_config
struct	arm_mmu_ptables
struct	k_mem_partition_attr_t

Macros
#define	MT_TYPE_MASK   0x7U
#define	MT_TYPE(attr)
#define	MT_DEVICE_nGnRnE   0U
#define	MT_DEVICE_nGnRE   1U
#define	MT_DEVICE_GRE   2U
#define	MT_NORMAL_NC   3U
#define	MT_NORMAL   4U
#define	MT_NORMAL_WT   5U
#define	MEMORY_ATTRIBUTES
#define	MT_PERM_SHIFT   3U
#define	MT_SEC_SHIFT   4U
#define	MT_P_EXECUTE_SHIFT   5U
#define	MT_U_EXECUTE_SHIFT   6U
#define	MT_RW_AP_SHIFT   7U
#define	MT_NO_OVERWRITE_SHIFT   8U
#define	MT_NON_GLOBAL_SHIFT   9U
#define	MT_PAGED_OUT_SHIFT   10U
#define	MT_RO   (0U << MT_PERM_SHIFT)
#define	MT_RW   (1U << MT_PERM_SHIFT)
#define	MT_RW_AP_ELx   (1U << MT_RW_AP_SHIFT)
#define	MT_RW_AP_EL_HIGHER   (0U << MT_RW_AP_SHIFT)
#define	MT_SECURE   (0U << MT_SEC_SHIFT)
#define	MT_NS   (1U << MT_SEC_SHIFT)
#define	MT_P_EXECUTE   (0U << MT_P_EXECUTE_SHIFT)
#define	MT_P_EXECUTE_NEVER   (1U << MT_P_EXECUTE_SHIFT)
#define	MT_U_EXECUTE   (0U << MT_U_EXECUTE_SHIFT)
#define	MT_U_EXECUTE_NEVER   (1U << MT_U_EXECUTE_SHIFT)
#define	MT_NO_OVERWRITE   (1U << MT_NO_OVERWRITE_SHIFT)
#define	MT_G   (0U << MT_NON_GLOBAL_SHIFT)
#define	MT_NG   (1U << MT_NON_GLOBAL_SHIFT)
#define	MT_PAGED_OUT   (1U << MT_PAGED_OUT_SHIFT)
#define	MT_P_RW_U_RW   (MT_RW | MT_RW_AP_ELx | MT_P_EXECUTE_NEVER | MT_U_EXECUTE_NEVER)
#define	MT_P_RW_U_NA   (MT_RW | MT_RW_AP_EL_HIGHER | MT_P_EXECUTE_NEVER | MT_U_EXECUTE_NEVER)
#define	MT_P_RO_U_RO   (MT_RO | MT_RW_AP_ELx | MT_P_EXECUTE_NEVER | MT_U_EXECUTE_NEVER)
#define	MT_P_RO_U_NA   (MT_RO | MT_RW_AP_EL_HIGHER | MT_P_EXECUTE_NEVER | MT_U_EXECUTE_NEVER)
#define	MT_P_RO_U_RX   (MT_RO | MT_RW_AP_ELx | MT_P_EXECUTE_NEVER | MT_U_EXECUTE)
#define	MT_P_RX_U_RX   (MT_RO | MT_RW_AP_ELx | MT_P_EXECUTE | MT_U_EXECUTE)
#define	MT_P_RX_U_NA   (MT_RO | MT_RW_AP_EL_HIGHER | MT_P_EXECUTE | MT_U_EXECUTE_NEVER)
#define	MT_DEFAULT_SECURE_STATE   MT_SECURE
#define	ARCH_DATA_PAGE_LOADED   BIT(0)
#define	ARCH_DATA_PAGE_ACCESSED   BIT(1)
#define	ARCH_DATA_PAGE_DIRTY   BIT(2)
#define	ARCH_DATA_PAGE_NOT_MAPPED   BIT(3)
#define	ARCH_UNPAGED_ANON_ZERO   0x0000fffffffff000
#define	ARCH_UNPAGED_ANON_UNINIT   0x0000ffffffffe000
#define	MMU_REGION_ENTRY(_name, _base_pa, _base_va, _size, _attrs)
#define	MMU_REGION_FLAT_ENTRY(name, adr, sz, attrs)
#define	MMU_REGION_DT_FLAT_ENTRY(node_id, attrs)
#define	MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY(compat, attr)
#define	DT_MEM_ATTR_TO_MT(dt_attr)
	Convert a DT zephyr,memory-attr value to ARM64 MT_* flags.
#define	MMU_REGION_DT_FLAT_ENTRY_FROM_DT(node_id)
	Auto-generate MMU region entry from a DT node's zephyr,memory-attr.
#define	DT_MEM_ARM64_MMU_IS_VALID(dt_attr)
	Check whether a DT memory attribute value is valid for the ARM64 MMU.
#define	ARM64_MMU_VALIDATE_DT_REGION(node_id)
	BUILD_ASSERT that a DT node's zephyr,memory-attr is valid for ARM64.
#define	MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY_FROM_DT(compat)
	Auto-generate MMU region entries for all matching nodes.
#define	K_MEM_PARTITION_P_RW_U_RW
#define	K_MEM_PARTITION_P_RW_U_NA
#define	K_MEM_PARTITION_P_RO_U_RO
#define	K_MEM_PARTITION_P_RO_U_NA
#define	K_MEM_PARTITION_P_RX_U_RX

Variables
const struct arm_mmu_config	mmu_config

Macro Definition Documentation

ARCH_DATA_PAGE_ACCESSED

#define ARCH_DATA_PAGE_ACCESSED   BIT(1)

ARCH_DATA_PAGE_DIRTY

#define ARCH_DATA_PAGE_DIRTY   BIT(2)

ARCH_DATA_PAGE_LOADED

#define ARCH_DATA_PAGE_LOADED   BIT(0)

ARCH_DATA_PAGE_NOT_MAPPED

#define ARCH_DATA_PAGE_NOT_MAPPED   BIT(3)

ARCH_UNPAGED_ANON_UNINIT

#define ARCH_UNPAGED_ANON_UNINIT   0x0000ffffffffe000

ARCH_UNPAGED_ANON_ZERO

#define ARCH_UNPAGED_ANON_ZERO   0x0000fffffffff000

ARM64_MMU_VALIDATE_DT_REGION

#define ARM64_MMU_VALIDATE_DT_REGION

(

node_id

)

Value:

IF_ENABLED(DT_NODE_HAS_PROP(node_id, zephyr_memory_attr), \
        (BUILD_ASSERT(DT_MEM_ARM64_MMU_IS_VALID( \
                DT_PROP(node_id, zephyr_memory_attr)), \
                "Unsupported zephyr,memory-attr for ARM64 MMU region " \
                DT_NODE_FULL_NAME(node_id));))

BUILD_ASSERT that a DT node's zephyr,memory-attr is valid for ARM64.

Nodes without the property are silently skipped.

Parameters

node_id

Devicetree node identifier.

DT_MEM_ARM64_MMU_IS_VALID

#define DT_MEM_ARM64_MMU_IS_VALID

(

dt_attr

)

Value:

(((dt_attr) & ~_DT_MEM_ARM64_SUPPORTED_MASK) == 0)

Check whether a DT memory attribute value is valid for the ARM64 MMU.

Parameters

dt_attr

The DT memory attribute value.

Returns

true if only supported bits are set.

DT_MEM_ATTR_TO_MT

#define DT_MEM_ATTR_TO_MT

(

dt_attr

)

Value:

((DT_MEM_ATTR_GET(dt_attr) & DT_MEM_CACHEABLE) ?                        \
        ((_DT_MEM_ARM64_ARCH_BITS(dt_attr) & ATTR_ARM64_CACHE_WB) ?     \
                (MT_NORMAL | MT_P_RW_U_NA | MT_DEFAULT_SECURE_STATE) :  \
                (MT_NORMAL_WT | MT_P_RW_U_NA | MT_DEFAULT_SECURE_STATE)) : \
        (MT_NORMAL_NC | MT_P_RW_U_NA | MT_DEFAULT_SECURE_STATE))

Convert a DT zephyr,memory-attr value to ARM64 MT_* flags.

The generic DT_MEM_CACHEABLE bit selects cacheable vs non-cacheable. The arch-specific ATTR_ARM64_CACHE_WB bit selects write-back vs write-through when cacheable. Device memory must be mapped through the MMIO device API instead.

Parameters

dt_attr

The DT memory attribute value from zephyr,memory-attr.

K_MEM_PARTITION_P_RO_U_NA

#define K_MEM_PARTITION_P_RO_U_NA

Value:

((k_mem_partition_attr_t) \
{MT_P_RO_U_NA})

K_MEM_PARTITION_P_RO_U_RO

#define K_MEM_PARTITION_P_RO_U_RO

Value:

((k_mem_partition_attr_t) \
{MT_P_RO_U_RO})

K_MEM_PARTITION_P_RW_U_NA

#define K_MEM_PARTITION_P_RW_U_NA

Value:

((k_mem_partition_attr_t) \
{MT_P_RW_U_NA})

K_MEM_PARTITION_P_RW_U_RW

#define K_MEM_PARTITION_P_RW_U_RW

Value:

((k_mem_partition_attr_t) \
{MT_P_RW_U_RW})

K_MEM_PARTITION_P_RX_U_RX

#define K_MEM_PARTITION_P_RX_U_RX

Value:

((k_mem_partition_attr_t) \
{MT_P_RX_U_RX})

MEMORY_ATTRIBUTES

#define MEMORY_ATTRIBUTES

Value:

((0x00 << (MT_DEVICE_nGnRnE * 8)) |     \
(0x04 << (MT_DEVICE_nGnRE * 8))   |     \
(0x0c << (MT_DEVICE_GRE * 8))     |     \
(0x44 << (MT_NORMAL_NC * 8))      |     \
(0xffUL << (MT_NORMAL * 8))       |     \
(0xbbUL << (MT_NORMAL_WT * 8)))

MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY

#define MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY	(		compat,
			attr )

Value:

DT_FOREACH_STATUS_OKAY_VARGS(compat, \
MMU_REGION_DT_FLAT_ENTRY, attr)

MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY_FROM_DT

#define MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY_FROM_DT

(

compat

)

Value:

DT_FOREACH_STATUS_OKAY(compat, MMU_REGION_DT_FLAT_ENTRY_FROM_DT)

Auto-generate MMU region entries for all matching nodes.

Parameters

compat

Devicetree compatible to iterate over.

Iterates over all status = "okay" nodes of compat and generates an MMU region entry for each node that has a zephyr,memory-attr property.

Note

This is a wrapper of MMU_REGION_DT_FLAT_ENTRY_FROM_DT.

MMU_REGION_DT_FLAT_ENTRY

#define MMU_REGION_DT_FLAT_ENTRY	(		node_id,
			attrs )

Value:

MMU_REGION_FLAT_ENTRY(DT_NODE_FULL_NAME(node_id), \
                          DT_REG_ADDR(node_id), \
                          DT_REG_SIZE(node_id), \
                          attrs),

MMU_REGION_DT_FLAT_ENTRY_FROM_DT

#define MMU_REGION_DT_FLAT_ENTRY_FROM_DT

(

node_id

)

Value:

IF_ENABLED(DT_NODE_HAS_PROP(node_id, zephyr_memory_attr),       \
        (MMU_REGION_FLAT_ENTRY(DT_NODE_FULL_NAME(node_id),      \
                DT_REG_ADDR(node_id),                           \
                DT_REG_SIZE(node_id),                           \
                DT_MEM_ATTR_TO_MT(                              \
                        DT_PROP(node_id, zephyr_memory_attr))),))

Auto-generate MMU region entry from a DT node's zephyr,memory-attr.

Unlike MMU_REGION_DT_FLAT_ENTRY which takes attrs as a parameter, this macro reads the memory type from the node's zephyr,memory-attr property and converts it to ARM64 MT_* flags at compile time.

Nodes without zephyr,memory-attr are silently skipped.

Parameters

node_id

Devicetree node identifier.

Note

This is a wrapper of MMU_REGION_FLAT_ENTRY and inherits its limitation: only the first reg bank is used. DT nodes with multiple reg entries are not fully covered.

MMU_REGION_ENTRY

#define MMU_REGION_ENTRY	(		_name,
			_base_pa,
			_base_va,
			_size,
			_attrs )

Value:

{\
        .name = _name, \
        .base_pa = _base_pa, \
        .base_va = _base_va, \
        .size = _size, \
        .attrs = _attrs, \
}

MMU_REGION_FLAT_ENTRY

#define MMU_REGION_FLAT_ENTRY	(		name,
			adr,
			sz,
			attrs )

Value:

MMU_REGION_ENTRY(name, adr, adr, sz, attrs)

MT_DEFAULT_SECURE_STATE

#define MT_DEFAULT_SECURE_STATE   MT_SECURE

MT_DEVICE_GRE

#define MT_DEVICE_GRE   2U

MT_DEVICE_nGnRE

#define MT_DEVICE_nGnRE   1U

MT_DEVICE_nGnRnE

#define MT_DEVICE_nGnRnE   0U

MT_G

#define MT_G   (0U << MT_NON_GLOBAL_SHIFT)

MT_NG

#define MT_NG   (1U << MT_NON_GLOBAL_SHIFT)

MT_NO_OVERWRITE

#define MT_NO_OVERWRITE   (1U << MT_NO_OVERWRITE_SHIFT)

MT_NO_OVERWRITE_SHIFT

#define MT_NO_OVERWRITE_SHIFT   8U

MT_NON_GLOBAL_SHIFT

#define MT_NON_GLOBAL_SHIFT   9U

MT_NORMAL

#define MT_NORMAL   4U

MT_NORMAL_NC

#define MT_NORMAL_NC   3U

MT_NORMAL_WT

#define MT_NORMAL_WT   5U

MT_NS

#define MT_NS   (1U << MT_SEC_SHIFT)

MT_P_EXECUTE

#define MT_P_EXECUTE   (0U << MT_P_EXECUTE_SHIFT)

MT_P_EXECUTE_NEVER

#define MT_P_EXECUTE_NEVER   (1U << MT_P_EXECUTE_SHIFT)

MT_P_EXECUTE_SHIFT

#define MT_P_EXECUTE_SHIFT   5U

MT_P_RO_U_NA

#define MT_P_RO_U_NA   (MT_RO | MT_RW_AP_EL_HIGHER | MT_P_EXECUTE_NEVER | MT_U_EXECUTE_NEVER)

MT_P_RO_U_RO

#define MT_P_RO_U_RO   (MT_RO | MT_RW_AP_ELx | MT_P_EXECUTE_NEVER | MT_U_EXECUTE_NEVER)

MT_P_RO_U_RX

#define MT_P_RO_U_RX   (MT_RO | MT_RW_AP_ELx | MT_P_EXECUTE_NEVER | MT_U_EXECUTE)

MT_P_RW_U_NA

#define MT_P_RW_U_NA   (MT_RW | MT_RW_AP_EL_HIGHER | MT_P_EXECUTE_NEVER | MT_U_EXECUTE_NEVER)

MT_P_RW_U_RW

#define MT_P_RW_U_RW   (MT_RW | MT_RW_AP_ELx | MT_P_EXECUTE_NEVER | MT_U_EXECUTE_NEVER)

MT_P_RX_U_NA

#define MT_P_RX_U_NA   (MT_RO | MT_RW_AP_EL_HIGHER | MT_P_EXECUTE | MT_U_EXECUTE_NEVER)

MT_P_RX_U_RX

#define MT_P_RX_U_RX   (MT_RO | MT_RW_AP_ELx | MT_P_EXECUTE | MT_U_EXECUTE)

MT_PAGED_OUT

#define MT_PAGED_OUT   (1U << MT_PAGED_OUT_SHIFT)

MT_PAGED_OUT_SHIFT

#define MT_PAGED_OUT_SHIFT   10U

MT_PERM_SHIFT

#define MT_PERM_SHIFT   3U

MT_RO

#define MT_RO   (0U << MT_PERM_SHIFT)

MT_RW

#define MT_RW   (1U << MT_PERM_SHIFT)

MT_RW_AP_EL_HIGHER

#define MT_RW_AP_EL_HIGHER   (0U << MT_RW_AP_SHIFT)

MT_RW_AP_ELx

#define MT_RW_AP_ELx   (1U << MT_RW_AP_SHIFT)

MT_RW_AP_SHIFT

#define MT_RW_AP_SHIFT   7U

MT_SEC_SHIFT

#define MT_SEC_SHIFT   4U

MT_SECURE

#define MT_SECURE   (0U << MT_SEC_SHIFT)

MT_TYPE

#define MT_TYPE

(

attr

)

Value:

(attr & MT_TYPE_MASK)

MT_TYPE_MASK

#define MT_TYPE_MASK   0x7U

MT_U_EXECUTE

#define MT_U_EXECUTE   (0U << MT_U_EXECUTE_SHIFT)

MT_U_EXECUTE_NEVER

#define MT_U_EXECUTE_NEVER   (1U << MT_U_EXECUTE_SHIFT)

MT_U_EXECUTE_SHIFT

#define MT_U_EXECUTE_SHIFT   6U

Variable Documentation

mmu_config

const struct arm_mmu_config mmu_config

extern