clock_mchp_subsys_dpll_out_config Struct Reference

DPLL Output configuration structure. More...

#include <zephyr/drivers/clock_control/mchp_clock_pic32cz_ca.h>

Data Fields
uint8_t	output_division_factor
	Determines the division factor of PLL VCO freq output 1 ≤ POSTDIV ≤ 63.

Detailed Description

DPLL Output configuration structure.

Field Documentation

output_division_factor

uint8_t clock_mchp_subsys_dpll_out_config::output_division_factor

Determines the division factor of PLL VCO freq output 1 ≤ POSTDIV ≤ 63.

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The documentation for this struct was generated from the following file:

• zephyr/drivers/clock_control/mchp_clock_pic32cz_ca.h